AXI violation on H2F interface of S10

I'm using the H2F AXI interface to access external RAM via EMIF on an S10 SX SoC DK (1SX280HU2F50E1VGAS).

There are situations where I see the valid signal of the W channel go from 1 to 0 while the ready signal is 0. This is a violation of the valid/ready handshake protocol of AXI.
After a while the system freezes because no more write transaction are accepted on the AW channel.

What can cause this? Are there any known bugs in the bus master of the HPS?

Here is a waveform I sampled with SignalTap that shows the behavior:

There is a Linux 6.1 running on the ARM core. The RAM on the FPGA side is used for video memory. It is listed in the device tree and our drivers use it to make video memory allocations.
The memory is then mapped into user space and our test application transfers data into the memory (e.g. texture data).