New Contributor
New ContributorHi @ventt ,
Sorry, I was away and busy with other things a bit. I understand the policy on responding to issues on this forum.
I have provided responses to your queries below, and updates on the issue which might be useful other readers.
Q. May I know are you using the MCDMA custom driver?
R. Yes, I am using the MCDMA custom driver.
Q. Besides, for the devmem utility, are you trying to perform the IP reset as in the Step 4. of Section 3.5.2.3.3.? The command you entered seems different from the one specified in the IP reset step.
R. Yes, I did try to perform IP reset as mentioned in Section 3.5.2.3.3.4 of the documentation.
Q. It is suggested to change the host PCIe support to Gen3 which follows the design. Could you try to perform the tests again after the changes made?
R. The host PCIe version support is set to auto. I can retry after setting it to Gen3 explicitly.
Update: I created a custom design with MCDMA + Dual Port On-chip RAM (target memory) + custom PIO-access block in Quartus 24.1 , and that seems to work on a different tower workstation specifically set up for testing the FPGA cards/designs. I could run my own host-side DMA applications, and can access the PIO interface directly using sysfs. The kernel version used is 5.15.0-88-generic. The design does not work with kernel version 5.15 as recommended in Section 3.5.2.1 of the MCDMA user guide. However, we have dedicated rack mounted 1U servers for these FPGA cards, and we would like to finally move to those servers as the FPGA hosts. These 1U servers have the same kernel and driver configuration as set up on the tower workstation. In few instances, the same design seems to work on the 1U servers, but the "Queue reset failed" error occasionally pops up. It would be great if you could comment on the possible reasons and fixes for this error.
Kind regards,
Arnab
