Altera_Forum
Honored Contributor
10 years agoProgramming the Cyclone V GT development board
I'm working with the Cyclone V GT development board and have not yet been able to configure the FPGA via Quartus II.
I'm quite new to FPGA programming, but I should say that I've successfully programmed an Altera CPLD as well as an Altera Cyclone V GX (on the terASIC Cyclone V GX FPGA development board), both using Quartus II. I'm using Quartus II Web Edition v15.0 (I was originally using v13.0sp1, but the Cyclone V chip on the GT dev board is not on the list of supported devices, so I upgraded to v15.0). I'm on a Win7 computer. I have a very simple piece of VHDL code (below) that turns on a user-defined LED in response to a user-defined push-button. This code was successfully tested on the GX dev board (with modifications for the LED and PushButton pin numbers). The code compiles in Quartus II v15.0, and I've done the pin mapping. Once the compilation is complete, I open Programmer, choose "USB-BlasterII [USB-1]" under "Hardware Setup" and then hit the "Add file" button and select the "led_button.sof" file in the "output_files" subdirectory of my project directory. I check the "Program/Configure" button and then push "Start". But the progress bar immediately says "(Failed)". I'll note that my steps in Programmer are slightly different that what's recommended in the User Guide for the Cyclone V GT dev board, which says: --- Quote Start --- Configuring the FPGA Using the Quartus II Programmer 1. Start the Quartus II Programmer. 2. Click Auto Detect to display the devices in the JTAG chain. 3. Click Add File and select the path to the desired .sof. 4. Turn on the Program/Configure option for the added file. 5. Click Start to download the selected file to the FPGA. Configuration is complete when the progress bar reaches 100%. --- Quote End --- i.e. I don't do "Auto Detect" since I have already selected my FPGA part number when I created the project (via "New Project Wizard"). FWIW, I didn't use the Auto Detect feature when I successfully configured the CPLD or Cyclone V GX FPGA... I have all DIP switches on the Cyclone V GT dev board set to the factory defaults. Also, I think that the USB Blaster drivers are installed correctly -- in Device Manager, I see a "JTAG Cables" listing showing the Altera USB-BlasterII listing (2 of them actually, one says "JTAG Interface", the other says "System Console Interface"). Any help is greatly appreciated. Here is my simple VHDL code.library ieee;
use ieee.std_logic_1164.all;
entity led_button is
port(
LED0: out std_logic; -- PIN_AM23
PUSH0: in std_logic -- PIN_AK13
);
end led_button;
architecture rtl of led_button is
begin
LED0 <= PUSH0;
end rtl;