VecFPGA
New Contributor
1 year agoProblem with JTAG_LOCK on MAX10 Development Kit: Unable to Program or Erase. CONF_DONE alway high.
Hi everyone,
I’m also having problems with the lock/unlock instruction in the mentioned example. The issue is that after programming the FPGA (on the MAX10 Development Kit) with the design example (in question), the following happens:
- When I activate the JTAG_LOCK command (with a button), I can still access the JTAG chain without any issues.
- The CONF_DONE pin is always high (even though it returns a different error, see below).
- I cannot program the .pof/.sof files, erase, or verify, and I get the following messages:
- Error (209012): Operation failed,
- Error (209014): CONF_DONE pin failed to go high in device 1. Make sure all communication cables are securely connected, select a different device, check the power on the target system, or make sure all nCE pins are connected to GND...
If I try to erase CFM0 or UFM individually, it says that the operation was successful, but that’s not the case because the application is still running on the FPGA.
I hope to get some feedback or ideas from you regarding this.
Thanks in advance.