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New ContributorMAX10M04 / Quartus Prime Lite Edition
Good morning,
I'm completing a project with MAX10M04 FPGA and Quartus Prime 20.1 Lite Edition software.
The project is in the final phase, everything works fine but I have a very strange problem: I used the schematic for the whole FPGA project and using the same component I built "1Encoder" four times it gives me problems just by connecting the hardware of the 4th component.
Not connecting this all the whole project works perfectly.
Are there any limitations using the "Lite Edition"?
I attach the FPGA project and the wiring diagram of my board.
Thanks.
28 Replies
NurinaRegular Contributor
Hi Gigi,
You can refer to page 3 of this document on how to use it: https://www.intel.cn/content/dam/altera-www/global/zh_CN/pdfs/literature/hb/qts/qts_qii51013.pdf
The Intel FPGA YouTube channel has some videos on it as well, you can start here: https://www.youtube.com/watch?v=nWIGG0eWpJU
Part 2 of the video lecture is available here: https://www.youtube.com/watch?v=gFclHedSomA
In most cases warning messages can be ignored. Can you attach a photo of the warning messages here so I can verify that it can be ignored?
Thanks,
Nurina
GigizHi Nurina,
In attachment you have the warnings report, you can also compile my project and look it.
I try to look the documentation and simulate my project ...
Can you simulated my project ?
Best Regards,
Gigi
- Gigiz
Hi Nurina,
I have not solve my problem yet, did you see the warnings report ?
Best Regards,
Gigi
- Nurina
Hi Gigi,
Have you simulated your design and confirmed the functionality? You should verify that your logic on RTL viewer are connecting as intended.
Regards,
Nurina
- Gigiz
Hi Nurina,
How I can do it ?
Where can I find RTL viewer ?
I have not experience with it, can you help me please ?
During the compile process I have some warning, are there somethings to need fix ?
Thanks,
Gigi
- Nurina
Hi Gigi,
So just to clarify, the anomaly mode is that when you add the 4th counter it doesn't function correctly while causing the other counters to function wrongly? Is there anything more to it?
Regards,
Nurina
- Gigiz
Hi Nurina,
The FPGA project is with all 4 counters, I have the problem with the first 3 counters only when I connect the 4th counter hardware signals:
EXT_ENC4_A on pin 85
EXT_ENC4_B on pin 86
EXT_ENC4_Z on pin 87
EXT_ENC4_ALARM on pin 88
Regards,
Gigi
- Nurina
Hi,
I tried compiling your project on my machine and it seems to work fine. Can you let me know what OS are you using and can you attach a picture of the error message you receive?
Thanks,
Nurina
P/S: Feel free to give Kudos to comments you find to be helpful.
- Gigiz
Hello Nurina,
I'm using Windows 10 OS.
I have not error messages in compiling process, I have only some warning messages.
The problem is on board functionality:
I have 4 quadrature encoder counter, in the schematic named "4Encoder", inside it I have 4 instance of single counter named "1Encoder" with lpm_counter5 functionality.
The problem is very strange: 1st, 2nd, 3th encoder running and counts properly, the 4th counter works with anomaly mode and influence the others (seems that reset the other counters).
Thanks,
Gigi
