Forum Discussion
New ContributorMax10 Security
New ContributorWhat is the correct approach to get the FPGA content secured? This means making sure it cannot be read out via JTAG. Therefore, how can the read-back process be prevented?
New ContributorI need an answer please....
Farabi_AlteraRegular Contributor
Hello,
MAX10 is not supported in Quartus Pro.
MAX10 dont support design security features like authentication, security key programming etc.
It only supports design encryption. Please refer here : https://www.intel.com/content/www/us/en/docs/programmable/683865/current/configuration-design-security.html
regards,
Farabi
- a1990
I know that the Max10 does not support authentication or key programming. However, it has an integrated flash memory.
Is it still a good security practice to use this device if we add the bitstream to the FPGA's internal storage? Does this approach have any drawbacks from a security standpoint?
