MAX10 ADC_VREF (Single Supply Device)

I am using a MAX 10 10M08SAE144C8G device (single-supply with internal ADC).

Power setup:

• VCCIO banks: mostly 3.3 V, one bank at 2.5 V (per datasheet, mixed voltages allowed)
• VCCA: 3.3 V (per datasheet: “Connect these pins to a 3.0 V or 3.3 V power supplies…”)
• ADC_VREF was initially wired directly to the 3.3 V rail

Observed behavior:

• With ADC_VREF tied to 3.3 V, the 3.3 V rail drew an additional ~200 mA
• Measuring ADC_VREF to GND (unpowered) showed approximately 20 Ω, which seems abnormal
• After isolating ADC_VREF from the 3.3 V rail, the excessive current draw on 3.3 V disappeared
• I have seen the same issue on all 4 prototype boards I've ordered.
• I can confirm the 200mA current is all going into the ADC_VREF pin but cannot explain why!

Questions:

1. Is ADC_VREF not intended to be tied directly to a low-impedance 3.3 V supply, even when VCCA = 3.3 V?
2. Does ADC_VREF require a separate reference source (internal reference, precision external reference, or current-limited/filtered supply)?
3. Does the low resistance (~20 Ω to GND) indicate likely permanent damage to the ADC reference circuitry?
4. Are there recommended protection components (series resistor, RC filter, etc.) when using an external reference?

I am using the ADC pins as digital pins driving some I2C busses, which are pulled up to 3.3V via 4k7 resistors according to the I2C spec.

And here is my power supply sheet. All +3V3 supplies are derived from the same regulator - they are just filtered version (using LC filter) of the main regulator output.

I’d appreciate clarification on the correct electrical usage of ADC_VREF and whether tying it directly to 3.3 V can cause latch-up or damage, even though VCCA itself supports 3.3 V.

Thank you!

LA