MAX10 10M04 - Not enough logic elements to use the ADC block?

Hi - I'm new to FPGA programming. I'm using the MAX10 10M04SAE144I7G on a board I made. I've gotten as far as programming it to blink LEDs and read pushbuttons now I'm trying to read an analog signal through an ADC pin.

From Intel's online tutorials to setup the ADC I used Quartus Platform Designer and created a block symbol file with the following components, modular ADC core Intel FPGA IP, ALTPLL Intel FPGA IP and JTAG to Avalon Master Bridge. When I go back to Quartus, load in the block symbol file and compile it says "Can't fit design in device". The total logic elements used says 7,432 when the 10M04 only has 4,032 logic elements available.

Is there a way to reduce the amount of logic elements that the ADC block uses?

What's the most simple way to read 1 analog input that uses the least amount of logic elements? Any simple vhdl code examples would be very helpful.

Thank you