Forum Discussion

Vigneswaran's avatar
Vigneswaran
Icon for New Contributor rankNew Contributor
4 months ago

LVDS support on Agilex 7

HI, Im working on INTEL AGILEX 7 F-SERIES X2 F-TILE FPGA.  Please clear my doubt   In True differential signalling of LVDS , it is mentioned as differential signal with common mode voltage of 1.4 y...
Configuration
Core Logic
Programmable Logic Device
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
4 months ago

Hi Vigneswaran,

you are right, DS90LV804 driver is at risk to exceed Agilex 7 absolute ratings due to larger Vocm tolerances. It should be also considered that on-chip rd termination is disabled in unconfigured FPGA state, resulting in even higher initial Vid. To keep on the safe side, I would either use a driver chip with tighter Vocm tolerance, add resistors that pull down common mode level or implement voltage dividers that shift signal level towards ground.

Regards
Frank