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Honored ContributorLUT help!!!
I have wrote this code for implementing a neural network.What it does is to take some values(inputs) and some weights and computes the SUM(values*weigths).What i want to do is to check if the total sum(values*weights)< threshold and correct the weights in order to sum(values*weights)>=threshold.I think that i have to store the weights on a look up table and change the values in order to sum(values*weights)>=threshold.How i can do this?.My code is :
LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.STD_LOGIC_SIGNED.ALL; ENTITY ANN IS GENERIC ( m : INTEGER := 4; -- Number of inputs or weights b : INTEGER := 8); --Number of bits per input or weight PORT ( x1,x2,x3,x4: IN UNSIGNED(b-1 DOWNTO 0); w : IN UNSIGNED(b-1 DOWNTO 0); clk: IN STD_LOGIC; y : buffer UNSIGNED(2*b-1 DOWNTO 0); id : buffer bit); END ANN; ARCHITECTURE NEURAL OF ANN IS TYPE weights IS ARRAY (1 TO m) OF UNSIGNED(b-1 DOWNTO 0); TYPE inputs IS ARRAY (1 TO m) OF UNSIGNED(b-1 DOWNTO 0); BEGIN PROCESS(clk,w,x1,x2,x3,x4) VARIABLE weight : weights; VARIABLE input : inputs; VARIABLE prod,acc : UNSIGNED(2*b-1 DOWNTO 0); VARIABLE sub : UNSIGNED(2*b-1 DOWNTO 0); BEGIN IF (clk'EVENT AND CLK='1') THEN weight:=w&weight(1 TO m-1); END IF; input(1):=x1; input(2):=x2; input(3):=x3; input(4):=x4; acc:=(OTHERS=>'0'); FOR j IN 1 TO m LOOP prod:=input(j)*weight(j); acc:=acc+prod; END LOOP; y<=acc; END IF; END PROCESS; END NEURAL;70 Replies
Altera_ForumAny help?Thanks
- Altera_Forum
I use altera quartus.I compiled the code above with no error and in the compilation report it refers how many registers,alu etc will be used for the implementation.I run and the simulation and the results are ok.But what i want to know is if the way i described to implement the thing i want is correct or if there is another more efficient way.Thank you very much
- Altera_Forum
What simulator are you using, Quartus or Modelsim?
If it's quartus, then you have to write code that would generate real logic, as that's all the simulater supports, which isnt what you've currently got. - Altera_Forum
In the code i wrote the response of these filters is different but this doesnt matter.The thing i care most is to be correct the logic.
- Altera_Forum
The output was a help signal for me to check if the results were correct.What i want to do is to read an image- lets say a 20x20 array.Then i want to apply in this image a filter.But i want to apply it in all over the image.This filter is a 4x4 array and its response is the sum of its elements.(4x4=16elements).So i thought that the best way to implement it is with the code above.
- Altera_Forum
are you trying to model an adder? or do you really want something that stores 25 arrays? they are 2 completly different things
If you are doing the adder, you dont need to store any arrays inside this entity. If you are modelling the storage, you dont need an output. - Altera_Forum
I understand what you mean,but i think i can write behavioral code to describe the function that the system i want to do.So if it does what is supposed to i think it is ok.Of course it would be more "digital" to implement it with the way you say but i dont have enough time.Of course i have already read some books ,as "circuit design with vhdl" by pedroni.So you say that what i described in my previous post it's false?Thanks again
- Altera_Forum
Here is a good start on the fundamentals of digital logic:
http://www.play-hookey.com/digital/ - Altera_Forum
You need to stop thinking this is a programming language. You cannot do things like you can in C and make logic out of them.
Please please please go and read up on digital circuits. All the code you keep posting shows you know nothing about digital logic. VHDL is not a programming language. - Altera_Forum
No i dont want to accumulate all these values,just 4 of them each time so its ok.To be more specific in order to help you understand exactly what i want to do.
Imagine a 20x20 array with integer values from 0 to 255(grayscale). I want to separate this array in 25 arrays each of one 4x4 and compute the sum of each one of these arrays.So i think that the best way to implement this, is to insert one array(4x4) compute the sum of its values,then insert the next array do the same thing etc.Do you thing that is right this way?I did something like this: LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY test IS PORT( x1,x2,x3,x4,x5,x6,x7,x8,x9,x10,x11,x12,x13,x14,x15,x16 : IN INTEGER RANGE 0 TO 255; clk,load : IN STD_LOGIC; output : out INTEGER RANGE 0 TO 2040); END test; ARCHITECTURE behavioral OF test IS TYPE filters1 IS ARRAY(0 TO 24) OF INTEGER RANGE 0 TO 2040; TYPE filters2 IS ARRAY(0 TO 24) OF INTEGER RANGE 0 TO 2040; signal fil1 : filters1; signal fil2 : filters2; BEGIN PROCESS(clk) variable count : integer:=(0); variable sum1_or,sum2_or,sum3_or,sum4_or,sum1_kath,sum2_kath,sum3_kath,sum4_kath : integer range 0 to 1020; variable filter1,filter2 : integer range 0 to 2040; begin IF(clk'EVENT AND clk='1') THEN IF(load='1') THEN IF(count<26) THEN sum1_or := x1+x2+x3+x4; sum2_or := x5+x6+x7+x8; sum3_or := x9+x10+x11+x12; sum4_or := x13+x14+x15+x16; filter1:=(sum1_or+sum2_or)-(sum3_or+sum4_or); fil1(count)<=filter1; sum1_kath := x1+x5+x9+x13; sum2_kath := x2+x6+x10+x14; sum3_kath := x3+x7+x11+x15; sum4_kath := x4+x8+x12+x16; filter2:=(sum1_kath+sum2_kath)-(sum3_kath+sum4_kath); fil2(count)<=filter2; count:=count+1; END IF; END IF; end if; END PROCESS; output<=fil1(0); END behavioral; Is it the right way?Thanks
