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Altera_Forum
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Honored ContributorIntegrate the Opencores's I2C ip into SOPC
Hello:
I gathered 2 messages about how to integrate Opencores's I2C IP into SOPC. And I just have got it work by following these instructions below. But one note is that you can not just include the header file "oc_i2c_master.h" directly. Please refer to Altera's application note "AN333" to wirte your own header file. ================================================= you can easily connect the I2C Wishbone core to the NIOS processor 1. Within SOPC builder, generate interface to user logic. 2. Select bus interface type: avalon register slave. 3. Add "i2c_master_top.v" design file. 4. Read port list from file. 5. Connect the signals as follow: wb_adr_i <=> address wb_dat_i <=> writedata wb_dat_o <=> readdata wb_we_i <=> write wb_stb_i <=> chipselect wb_cyc_i <=> chipselect wb_inta_o <=> irq wb_clk_i <=> clk wb_ack_o <=> waitrequest_n wb_rst_i <=> always0 arst_i <=> reset_n scl_pad_i <=> export scl_pad_o <=> export scl_padoen_o <=> export sda_pad_i <=> export sda_pad_o <=> export sda_padoen_o <=> export 6. Under timing tab, leave the setup, wait and hold settings at 0 cycles. You can now access the I2C core via included "oc_i2c_master.h". ======================================================== Original message is written by "Guido Kuhlmann" from the Opencores forum. reference from: (http://www.opencores.org/forums.cgi/cores/2004/04/000609) ======================================================== If you have integrated the I2C IP from Opencores into your system correctly there are only some more steps to bring it to work. 1. Insert -> Symbol ... 2. 2x primitives -> buffer -> tri 3. 2x primitives -> logic -> not 4. 2x primitives -> pin -> bidir 5. connect "scl_padoen_o" and "sda_padoen_o" to the input of the "not"-logics 6. connect "scl_pad_o" and "sda_pad_o" to the input of the "tri"-buffers 7. connect the output of the "not"-logics to the corresponding output-enables of the "tri"-buffers 8. name the output of the "tri"-buffers "i2c_scl" and "i2c_sda" 9. connect "i2c_scl" and "i2c_sda" to the corresponding inputs of the I2C IP 10. connect "i2c_scl" and "i2c_sda" to "bidir"-pins That's it! ======================================================== Original message is written by "niosIIuser" from the Nios forum. reference from : (here (http://www.niosforum.com/forum/index.php?act=st&f=2&t=590&hl=opencore)) ========================================================16 Replies
Altera_ForumOV's SCCB is I2C. GPIO is general prupose PIO. I think there are a lot of things you need to learn. FIrst you should study some PIO exercises, such as LED, button switch etc. Next you can find some application note on I2C from www.nxp.com. Then you can build your own I2C interface routines. Get some reading about interface and embeded programming books. You'd learn from the bottom up.
Sorry, I cannot help you step by step. I posted a i2c-gpio driver for uClinux, but I don't know if it help.- Altera_Forum
Hi again hippo.
if you can, please answer this question too. Always about PIO, i'd like to know if i must edit altera_avalon_pio_regs.h. for adding SCCB\I2C registers. In some way i have to add these registers,am i wrong? Doing that, every PIOs i'm using will have this new build? In other way how to access these registers and create this interface? Many thanks again - Altera_Forum
Many thanks hippo.
At first,what's a GPIO? In my case,i must create a software interface for communicating with an Omnivision Camera(OV6620) which uses not just I2C but SCCB.I read that this difference it's only for respecting Philips's"copyright" . Do you know something about that? Are some radical differences between these interfaces or not? I'm a beginner with Nios II and i thought that a software for an interface,for example for SCCB, was "global" for every kind of SCCB devices. Would possible to use ready made software? Can you help me ? Thanks again. - Altera_Forum
Yes, I suggest using GPIO and software instead of hardware. Most i2c tasks are only initialization. They are not speed or performance critical.
You will need to use a osc scope or siganl tap to monitor your io pins. Check pins toggles and senses. You may find a lot of software i2c drivers, some are for 8051. Once you understand the timing, you can make one easily. - Altera_Forum
Hi.
So you sugggest me to use a PIO for interfacing the couple of I2C\SCCB wires instead creating a HDL block? Do you mean that? Obviously i have to create drivers for I2C registers. I tried to use,as i said you, Port Ref Plat opencore i2c master and it doesn't function.Further i tried 3 different I2C software version whith that and again it didin't function. Probably you're right. Many thanks. - Altera_Forum--- Quote Start --- originally posted by tonnoplast@Jan 26 2007, 05:32 AM hi. should you give the open cores i2c please?
and where is possible to find the code on c language for that? i tried the one on portable reference platform but it's not right.
many thanks
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--- Quote End --- I think using a hardware i2c core is over-killed to the simple problem. You can use pio to access i2c with a simple software approach. You can look at the i2c bus or chips spec. There are bitbanging pio drivers on Linux. Most PC motherboards use pio to access i2c/smbus, too.
- Altera_Forum
Hi. Should you give the open cores i2c please?
And where is possible to find the CODE on C language for that? I tried the one on Portable Reference Platform but it's not right. Many thanks - Altera_Forum--- Quote Start --- originally posted by tom@mrg@May 15 2006, 03:16 AM hi, if you get the document on the i2c core at opencores, it says you can just export the reset pin and tie it low.
with the two chipselects, just ignore the error - sopc just connects both to chipselect anyway (you can see this in the ptf)
But[/b], you will find it will not compile in quartus Because of the 'generic' problem covered above. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif If you repeat the process using the 'oc_i2c_master_top' provided by FMousset above, you not only get a core that is easier to attach to the NIOS but it compiles and there is no need to mess about with the tristate buffers etc. So the way I made it work is as follows: 1) I downloaded " i2c_master_bit_ctrl.vhd, i2c_master_byte_ctrl.vhd and i2c_master_top.vhd" from open cores 2) I pasted FMoussets code into notepad and called it oc_i2c_master_top.vhd (NO CAPITAL LETTERS) Thanks to FMousset for the code! 3) In SOPC builder I created a new component using the oc_i2c_master_top as the VHDL source file. No other changes are required, as all the signals are already set up http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif 4) Put the newly created 'oc_i2c_master' into your sopc and generate. 5) Attach two bidir pins to the scl and sda outputs from the sopc and you are done! We are running it in a 2C35 with no problems (so far!) http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif Hope this helps <div align='right'><{post_snapback}> (index.php?act=findpost&pid=15374) --- Quote End --- [/b] --- Quote End --- http://via.fps-tech.org/svn/fpga/cores/i2c_master/trunk/ (http://via.fps-tech.org/svn/fpga/cores/i2c_master/trunk/) A ready made avalon component - no need to do all of this.
- Altera_Forum
Hi, If you get the document on the I2C core at opencores, it says you can just export the reset pin and tie it low.
With the two chipselects, just ignore the error - SOPC just connects both to chipselect anyway (you can see this in the ptf) but, you will find it will not compile in quartus Because of the 'generic' problem covered above. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif If you repeat the process using the 'oc_i2c_master_top' provided by FMousset above, you not only get a core that is easier to attach to the NIOS but it compiles and there is no need to mess about with the tristate buffers etc. So the way I made it work is as follows: 1) I downloaded " i2c_master_bit_ctrl.vhd, i2c_master_byte_ctrl.vhd and i2c_master_top.vhd" from open cores 2) I pasted FMoussets code into notepad and called it oc_i2c_master_top.vhd (NO CAPITAL LETTERS) Thanks to FMousset for the code! 3) In SOPC builder I created a new component using the oc_i2c_master_top as the VHDL source file. No other changes are required, as all the signals are already set up http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif 4) Put the newly created 'oc_i2c_master' into your sopc and generate. 5) Attach two bidir pins to the scl and sda outputs from the sopc and you are done! We are running it in a 2C35 with no problems (so far!) http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif Hope this helps - Altera_Forum
Hi,
I can't succesfully implement I2C opencore by Component Editor. First, for the Verilog version, when I added i2c_master_top.v, the Errors Analyzing found wrote: can't open Verilog Design File "i2c_master_defines.v", but this file is near i2c_master_top.v Why? Second, for the VHDL version is no errors, but I can't find "always0" in "Signal Type" column (in Interface to User Logic it was), but I can resolve this problem by type "external" and out of SOPC component tie to ground (it is good idea or not?). But what about two chipselects? In Interface To User Logic I can set two chipselects signal but in Component Editor I can't? What I have to do? Thank you for your advise
