How to do serdes pin swapping for Ftile PCIe IP

Hello,

We have purchased a few AGFB027 FPGA dev kits, and are testing the F-Tile PCIe IP. The schematic shows that the PCIe serdes pins connected to the QSFP port have 3 pairs of serdes swapped in polarity for the purpose of routing.

I tried to do the re-swapping of polarity in the logic design by connecting the 'p' pin to the 'n' port of the IP. However, quartus fitter reports error when I do that.

I opened the PCIe IP configuration, and couldn't find any place that allows me to configure the re-swapping of serdes pins.

Can anyone tells me how the swapping of serdes pins can be done properly?

Error (22243): Cannot place the block FpgaPcieWrapper_inst|fpw_Intel_Ftile_ControllerWrapper_inst|fpw_Intel_Ftile_Pcie_Controller_4x4_upstream_inst|pcie_avst_f_0|pcie_hip_top_f_inst|pcie_hip_bb_f_inst|f_ux_inst5|x_bb_f_ux_rx at location fgt_q1_ch3_rx because port xcvr_data0_link connects to block FpgaPcieWrapper_inst|fpw_Intel_Ftile_ControllerWrapper_inst|fpw_Intel_Ftile_Pcie_Controller_4x4_upstream_inst|pcie_avst_f_0|pcie_hip_top_f_inst|pcie_hip_bb_f_inst|f_pcie_inst and port xcvr_data_link[5] but the port at this location cannot connect to such a port.