Forum Discussion
Occasional ContributorArria 10SX current drawn during non-volatile key programming
Hi,
we are using in our design an Arria10 SX (precisely the 10AS027E4F29E3SG) device. The design had been successfully manufactured for approx. 100 units. For one customer we decided to use design security and started to program a non-volatile key into the FPGA and use encrypted bitstreams later on. It turned out that appox every tenth unit failed now because the power manager found either an excessive current on the global supply or the VCCPT (1.8V) was degraded while programming the non-volatile key.
Note, the supply driving the VCCPT had been designed to provide +70% current as calculated by the Quartus power analyzer (by the way it did not help that this support had been removed for Arria 10 from Quartus Pro, I did not check which versions actually support it, 18.1 works, 23.2 fails). Thus there is a reserve of approx 550mA at the supply. It obviously comes to its limits during the non-volatie key programming.
I searched (again) for a specification in the Altera Arria 10 documentation (mainly datasheet, handbook and AN556) which current is drawn on which supply while programming the non-volatile key. I did not find any information on that. Can you please point me to the documentation where I can find this specification or can you provide me the numbers? Even an estimate will help.
Thank you!
Gerhard
8 Replies
GerhardCadekHi,
thank you for this information although it does not explain why we see the issues on our board.
Have a great time
Gerhard
- Farabi_Altera
Regular Contributor
Hello,
I checked with validation team. There is no data on power consumption during programming non-volatile key. This is because the power consumption to program non-volatile key supposed to be not exceed the power consumption during user mode.
The non-volatile key programming stage is before the configuration stage, and the power consumption for programming non-volatile key will not exceed the power in user mode(where all the IOs are active, clock are toggling at highspeed etc). You are designing the power delivery network based on user mode, not based on programming power where all the IOs and clocks are inactive.
regards,
Farabi - GerhardCadek
Hi,
I am sorry but you did not get the point. While the current consumption of the regular design depends on the amount of logic we are using I am solely interested in the current required for programming the non-volatile fuse of the Arria 10 SX FPGA. This current adds on top of all other currents drawn by our logic. This current is not specified at all. The PDN tool is thus useless for this task. Please provided this information.
Thank you
Gerhard
- Farabi_Altera
status : checking with validation team.
- GerhardCadek
Hi,
VCCPT is shared with VCCIOREF_HPS, VCCA_PLL, VCCH_GXBL, VCCPLL_HPS. PDN had not been used. We do not see any power nor current issue under normal conditions. We see unexpected current and voltage drop while programming the non-volatile key. Thus I am looking for the spec of this current. Without these numbers we cannot adapt nor model the power distribution.
Regards
Gerhard
- Farabi_Altera
Hi,
Current requirement is different from each designs. If you use more IOs, higher speed, it will consume more current, if you use less resource, it will use less current. I can't give the current spec as this is design dependent. The recommendation is to use PDN so the tool will calculate the current consumption of your unique design.
regards,
Farabi
- Farabi_Altera
Hello, VCCPT is supplying IO power rails. Are you sharing VCCPT with other power rails?
Have you run PDN (power distribution network) to estimate the power of this power rail.
regards,
Farabi - Farabi_Altera
status update : checking with internal team
