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Altera_Forum's avatar
Altera_Forum
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16 years ago

how can I use sdram

hello,everybody:

I want to use off chip sdram as a data menmory.

First I store some data in sdram.

Second I want process these data in nios II processor using c language.

But how can I read these data from sdram in nios II IDE platform.

Shall I use IORD or using arry pointer.

Thank you !!

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    hello,everybody:

    I want to use off chip sdram as a data menmory.

    First I store some data in sdram.

    Second I want process these data in nios II processor using c language.

    But how can I read these data from sdram in nios II IDE platform.

    Shall I use IORD or using arry pointer.

    Thank you !!

    --- Quote End ---

    Thank you! I know his.But how can I use shese data in NIOS II IDE.SUCh as

    I store 1,2,3,4,...5000 in SDRAM in advance.Then in NIOS II IDE,I want to read these data,so I can process these data by c language.How can I read?

    Shall there have a function or outher methods.
  • Altera_Forum's avatar
    Altera_Forum
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    you should read the application note an517, that you can download from http://www.altera.com/literature/an/an517.pdf

    with IORD and IOWR you should be able to write and read to/from the SDRAM... here you have a simple code as example.

    void readFromSDRAM(int offset){
        unsigned int DDR_read_OFFSET_ADDRESS = offset;
        unsigned int read_data;
        if ((DDR_read_OFFSET_ADDRESS<0) || (DDR_read_OFFSET_ADDRESS>=(ALTMEMDDR_SPAN/4))){
            printf("error");
        }else{
            read_data=IORD(ALTMEMDDR_BASE,DDR_read_OFFSET_ADDRESS);
            printf("Read %08x from address %08x \n",read_data,(ALTMEMDDR_BASE+DDR_read_OFFSET_ADDRESS));
        }
    }
    void writeToSDRAM(int data, int offset){
        unsigned int DDR_write_OFFSET_ADDRESS = offset;
        if((DDR_write_OFFSET_ADDRESS<0)||(DDR_write_OFFSET_ADDRESS>=(ALTMEMDDR_SPAN/4))){
            printf("error");
            return;
        }
        IOWR(ALTMEMDDR_BASE,DDR_write_OFFSET_ADDRESS,data);
        if (IORD(ALTMEMDDR_BASE,DDR_write_OFFSET_ADDRESS)==data){
            printf("Data: %08x is correctly written to memory offset: %08x \n",data,DDR_write_OFFSET_ADDRESS);
        }else{
            printf("error");
        }
    }
  • Altera_Forum's avatar
    Altera_Forum
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    I need help regarding the first phase you did which is writing into the SDRAM using Verilog.

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I need help regarding the first phase you did which is writing into the SDRAM using Verilog.

    --- Quote End ---

    It`s one of the way to use sdram:

    1. great in SOPC system with 1. sdram controller core (http://www.altera.com/literature/hb/nios2/n2cpu_nii5v3.pdf) and avalon master (look at AVM.ZIP)

    2. connect your master in verilog ( with avalon (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=mnl_avalon_spec)) to made system

    about avalon (http://www.altera.com/products/software/quartus-ii/subscription-edition/design-entry-synthesis/qts-des-ent-syn.html#sopc)
  • Altera_Forum's avatar
    Altera_Forum
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    Thanks for your quick reply.

    I want to make sure that this solution you provided is pure Verilog (There is no NIOSII).

    Because I saw a SOPC builder.

    I only need a Verilog module that is able to write into the SDRAM without NIOS.

    Please, if you can illustrate it a little bit for me, it will be very helpful for me.

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I want to make sure that this solution you provided is pure Verilog (There is no NIOSII).

    Because I saw a SOPC builder.

    --- Quote End ---

    Do you wish to write owner sdram controller (in verilog)?

    --- Quote Start ---

    I only need a Verilog module that is able to write into the SDRAM without NIOS.

    --- Quote End ---

    NIOS is only part of SOPC facilities. I would recommended to read quartus. embedded peripherals (http://www.altera.com/literature/hb/nios2/n2cpu_nii5v3.pdf)

    --- Quote Start ---

    Please, if you can illustrate it a little bit for me, it will be very helpful for me.

    --- Quote End ---

    Look at attachment. It`s only piece of my project (verilog), summary:

    1. exten device (camera. without file) -> fifo -> controller_sops (without verilog) -> sopc_sdram_0 -> sdram

    2. sdram -> sopc_sdram_0 -> controller_sops (without file) -> uart

    note: in sopc_sdram_0 there are 2 no coupled part (1-write sdram, 2 - read sdram)

    of course, it`s only part exampl, but i think it would help you.
  • Altera_Forum's avatar
    Altera_Forum
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    I have now the example of DE2_CCD. I am trying to extract the SDRAM part from it.

    Yes, it has SOPC without NIOS. I got it now.