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I want to make sure that this solution you provided is pure Verilog (There is no NIOSII).
Because I saw a SOPC builder.
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Do you wish to write owner sdram controller (in verilog)?
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I only need a Verilog module that is able to write into the SDRAM without NIOS.
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NIOS is only part of SOPC facilities. I would recommended to read quartus. embedded peripherals (
http://www.altera.com/literature/hb/nios2/n2cpu_nii5v3.pdf)
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Please, if you can illustrate it a little bit for me, it will be very helpful for me.
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Look at attachment. It`s only piece of my project (verilog), summary:
1. exten device (camera. without file) -> fifo -> controller_sops (without verilog) -> sopc_sdram_0 -> sdram
2. sdram -> sopc_sdram_0 -> controller_sops (without file) -> uart
note: in sopc_sdram_0 there are 2 no coupled part (1-write sdram, 2 - read sdram)
of course, it`s only part exampl, but i think it would help you.
Honored Contributor
