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I need help regarding the first phase you did which is writing into the SDRAM using Verilog.
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It`s one of the way to use sdram:
1. great in SOPC system with 1. sdram controller core (
http://www.altera.com/literature/hb/nios2/n2cpu_nii5v3.pdf) and avalon master (look at AVM.ZIP)
2. connect your master in verilog ( with avalon (
http://www.altera.com/literature/manual/mnl_avalon_spec.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=mnl_avalon_spec)) to made system
about avalon (
http://www.altera.com/products/software/quartus-ii/subscription-edition/design-entry-synthesis/qts-des-ent-syn.html#sopc)
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