Altera_Forum
Honored Contributor
14 years agoglobal clock buffer problems
Dear all,
Here is my code for multiplexer. I used a secondary global clock buffer (BUFGS) in the code. --------------------------------------------------------------------- library ieee; use ieee.std_logic_1164.all; entity clock_mux is port (DATA, SEL : in std_logic; SLOW_CLOCK, FAST_CLOCK : in std_logic; DOUT : out std_logic); end clock_mux; architecture XILINX of clock_mux is signal CLOCK : std_logic; signal CLOCK_GBUF : std_logic; component BUFGS port (I : in std_logic; O : out std_logic); end component; begin Clock_MUX : process (SEL) begin if (SEL = '1') then CLOCK<= FAST_CLOCK; else CLOCK<= SLOW_CLOCK; end if; end process; GBUF_FOR_MUX_CLOCK : BUFGS port map (I=> CLOCK, O=> CLOCK_GBUF); Data_Path : process (CLOCK_GBUF, DATA) begin if (CLOCK_GBUF'event and CLOCK_GBUF = '1') then DOUT<= DATA; end if; end process; end XILINX; ----------------------------------------------------------------------- But the error occurred after compile the code: Error: Node instance "GBUF_FOR_MUX_CLOCK" instantiates undefined entity "BUFGS" As i know, we need to instantiate the BUFGS by using the Insert Pads command. However, i do not clear about the Insert Pads command. Can anyone help me please. Many thanks