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Altera_Forum
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14 years ago

global clock buffer problems

Dear all, Here is my code for multiplexer. I used a secondary global clock buffer (BUFGS) in the code. --------------------------------------------------------------------- library ieee; ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

dr_conan,

the "equivalent" of BUFGS in Quartus would be GLOBAL.

http://quartushelp.altera.com/9.1/mergedprojects/hdl/prim/prim_file_global.htm

That said, nowadays both Quartus and ISE will (mostly) promote signals to global lines as needed.

Anyway, using logic to implement clock multiplexers is somethings best avoided, as it has high delay and possible glitches.

In Altera FPGAs, use the ALT_CLKCTRL primitive instead.