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Thulasi's avatar
Thulasi
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14 days ago

Global Clock & Regional clock inputs in Agilex M FPGA

Hi, Kindly answer the following query related to USB PHY connection to MAX10 in Agilex I series FPGA design. In the reference design, why USB phy is connected to BMC(MAX10) in PCIe based card based...
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AqidAyman_Altera's avatar
AqidAyman_Altera
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10 days ago

Hi Thulasi,

 

Can you clarify if you are referring to Agilex M or Agilex I, as the title and the question you asked are in a different context?

Also, can you give me the link to the reference design you are referring to?

 

Regards,
Aqid

  • Thulasi's avatar
    Thulasi
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    10 days ago

    Hi,

    Please find the attached diagram based on Agilex M FPGA. 

    We want to know the function of USB interface in this board. Any document giving the details would be great.

    • AqidAyman_Altera's avatar
      AqidAyman_Altera
      Icon for Regular Contributor rankRegular Contributor
      2 hours ago

      This is what I found in the Agilex 7 FPGA M-Series HBM2e Development Kit User Guide on the description of the signal connecting to this USB PHY.


      Regards,