Generate patterns through CPLD(MAXII)?

Hi Cliff,

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I tried lpmshiftreg in Megafunction of QuarterII and it works finally.

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Great! But take the time to look at the Modelsim simulation example too. Its a very powerful tool, and worth learning.

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Thanks for your patience replying me so many questions.

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You're welcome.

Cheers,

Dave

Hi Dave,

I tried lpmshiftreg in Megafunction of QuarterII and it works finally. Thanks for your patience replying me so many questions.

Cliff

Hi Cliff,

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I learned with the lpmshiftreg mega function but still got problems.

I attached the simulation waveform.

Basically, the serial output have no response after CLK enabled when d[7..0] was put as data input.

Do you know why?

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Can you please upload a testbench for the device. That'll make it clearer whether you are using it correctly. If you need an example testbench to get you started, use the one on this thread:

http://www.alteraforum.com/forum/showthread.php?t=32386

Cheers,

Dave

Dave,

I learned with the lpmshiftreg mega function but still got problems.

I attached the simulation waveform.

Basically, the serial output have no response after CLK enabled when d[7..0] was put as data input.

Do you know why?

Thanks!

Cliff

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I read through the articles and found that it's too difficult to me.

Any starting materials that I can refer to generate serial patterns?

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Download the Byteblaster.zip file I posted here. There is an SPI shift register in there. It has a Modelsim simulation. Run it. Read it. Try to understand it.

http://www.alteraforum.com/forum/showthread.php?t=32434&page=3

Cheers,

Dave

I read through the articles and found that it's too difficult to me.

Any starting materials that I can refer to generate serial patterns?

Thanks!

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I'd like to generate serial patterns from laptop, not parallel input. Can I do that through LFSR?

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Parallel/serial, it doesn't matter. Its just bits.

Cheers,

Dave

Thanks, Dave.

I'd like to generate serial patterns from laptop, not parallel input. Can I do that through LFSR?

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Before going that far, I need to generate serial patterns for some purpose.

How can I generate serial patterns?

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With a parallel to serial shift register?

Look at the documents on this page:

http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/%7edwh/carma_board/)

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)

http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/at84ad001b_tests.pdf)

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/ad9956_tests.pdf)

They all have examples of devices with serial interfaces, along with the FSM designs. Just copy something in there.

If you want to generate a long sequence of random bits, then use an LFSR:

http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/lfsr_tutorial.pdf)

These sequences are not really random, in that they follow a well defined pattern. You can generate an LFSR serial pattern, capture the first few bits and use that as a seed to a receiver-side LFSR checker. This is how the Altera pattern-generator and pattern-checker cores work.

Cheers,

Dave

Dave,

Before going that far, I need to generate serial patterns for some purpose.

How can I generate serial patterns?

Thanks!