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Altera_Forum
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14 years ago

Generate patterns through CPLD(MAXII)?

I'm new to FPGA/CPLD. Could any one help me? I'm wondering if I can use CPLD/FPGA to generate some patterns to output pins? This is for some simple test purpose. For example, under 50MHz clo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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I read through the articles and found that it's too difficult to me.

Any starting materials that I can refer to generate serial patterns?

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Download the Byteblaster.zip file I posted here. There is an SPI shift register in there. It has a Modelsim simulation. Run it. Read it. Try to understand it.

http://www.alteraforum.com/forum/showthread.php?t=32434&page=3

Cheers,

Dave