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prabu's avatar
prabu
Icon for New Contributor rankNew Contributor
2 years ago

FPGA IP related clarification in Quartus 13 version

Hi Team,

We are using Cyclone III EP3C40F484C6 device 13.0 version in our project. It is updated from old design that is 9.1 version.

In design , for pwm control accumulator IP is used in 9.0 version. We tried to implement the same design in 13.0 version but could not instantiate ACCUMULATOR (ALT_ACCUM) in qsys window.

Could you please help us to find the accumulator ip . If that ip is not available in 13.0 version, can we use ALTMULT_ACCUM?

but we need addsub control signal for ALTMULT_ACCUM IP. is addsub port available in this IP?

Please help us for this issue.

4 Replies

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Hi,

    in Quartus 13.1, I have alt_mult_accum available in Megawizard for Cyclone III target, but not e.g. for Cyclone V.

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Sorry I misunderstood the question. Quartus 13 clearly states that altaccum is no longer available.

    You can either use altaccum design files generated in Quartus 9, or instantiate alt_add_sub with 1 cycle pipeline delay and feed back the output to input a.

  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


    p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 5/5 survey