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Altera_Forum's avatar
Altera_Forum
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17 years ago

FPGA Configuration using CPLD!

Hi all,

I have a question need your precious comments.

As I create my pcb with a Arria and MAXII. I planned to use Paralle Flash Loader in CPLD to configurate Arria.

After following AN386, I successfully download and write FPGA image to a CFI flash.

I use NIOSII IDE to programming and NIOSII command shell to read back. The data existed in flash.

After power cycle, the CPLD should start to move data from flash to FPGA but it's not working.

The input clock to PFL is 27MHz as attached qar.

I measure the address pin, there's 2 high level during flash OE period :confused:.

I wonder any one ever using this function and provide me your experience on that.

Thank you!

BRs,

Johnson

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  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi Johnson,

    The remote system upgrade settings enables state machine in the Arria to control retrying configuration. If you choose FPP w/ decompression setting, you should set appropriate option when creating POF file. The PFL and Arria know whether the data is compressed or not from the POF format.

    To create decompressed POF, you should check the compress button which appears pressing property.

    Regards,
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi Gee,

    Thanks for your file.

    I have seen this and settings in my project. I just could not make sure if the Arria and PFL function could really implement this during configuration as I haven't seen this setting in PFL megafunction instintiation steps. Instead there's only a FPP or PS selection.

    I also ask for cource code for this FPP... as I might need to change some settings like for PGM.

    If you know where I could find information about PFL, please let me know..

    Thanks so much for your help on this.

    Best Regards,

    Johnson
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi Johnson,

    Are you using FPP with decompression mode? If so, MSEL(3:0) should be set "1011" which makes Arria to know receiving data compressed. The compress option should be set when generating POF, which generate compressed POF. There is a flag to show data is compressed in the POF, so the PFL knows it and send data in every four dclk.

    You can find the PFL source code in C:\altera\81\quartus\libraries\megafunctions folder, but unfortunately Altera doesn't disclose the details on how PFL works.

    Thanks,
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi Gee,

    I made some measurement and found the Configuration process was stopped after 800us.

    I have no idea about what might happen during Configuration as smaller project is ok and the same sof could download via JTAG and function properly.

    Any comments on this?

    Thanks.

    Best Regards,

    Johnson
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Take a look at this document:

    http://www.altera.com/literature/hb/agx/agx_52011.pdf

    Any chance the pull-up on conf_done or nStatus is missing?

    Posting the .cof file and the PFL megawizard generated .v or .vhd file might provide some clues. What is MSEL(3:0) set too? Is the .sof file you are using have compression enabled(see figure 11.1 of above document)?

    If you are using compression, read pages 11-5 and 11-6.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi Johnson,

    Do you mean PFL loads data successfully with one data and fails another?

    Would you upload PFL design that you put counter to delay starting PFL? I will check it anyway.

    Thanks