Altera_Forum
Honored Contributor
10 years agoFitter Question
In the verilog file, I define a LUT like this:
cycloneii_lcell_comb \fpu_exceptions:u6|out~40_I ( .dataa(\fpu_exceptions:u6|out_2[40] ), .datab(rst), .datac(\fpu_exceptions:u6|out~32 ), .datad(in), .combout(\fpu_exceptions:u6|out~40 )); defparam \fpu_exceptions:u6|out~40_I .sum_lutc_input = "datac"; defparam \fpu_exceptions:u6|out~40_I .lut_mask = "0F22"; But after the Fitter(Place & Route), the architecure of that LUT is dispalyed in the picture. The signals which linked with dataa, datab, datac, datad respectively are changed. And the mask of this LUT is changed too. How can I do to avoid those changes. http://www.alteraforum.com/forum/attachment.php?attachmentid=10691&stc=1