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Altera_Forum
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11 years ago

Fitter Question

In the verilog file, I define a LUT like this: cycloneii_lcell_comb \fpu_exceptions:u6|out~40_I ( .dataa(\fpu_exceptions:u6|out_2[40] ), .datab(rst), .datac(\fpu_exceptions:u6|out~32 ), ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi Tim,

I believe Quartus II will help to perform optimization during the Analysis and synthesis to get the optimal implementation of your code into the hardware. As long as the hardware functionality or simulation behavior is correct, I think it should be ok.