Forum Discussion
Altera_Forum
Honored Contributor
11 years agoFitter Question
In the verilog file, I define a LUT like this: cycloneii_lcell_comb \fpu_exceptions:u6|out~40_I ( .dataa(\fpu_exceptions:u6|out_2[40] ), .datab(rst), .datac(\fpu_exceptions:u6|out~32 ), ...
Altera_Forum
Honored Contributor
11 years agoHi Irish,
There have no error message during compilation.