Fitter problem

Hi All,

I have embarked on a project to develop a stopwatch which outputs seconds and minutes as a binary value. I am using two separate 8-bit LED boards connected to the MAX7000S EPM7128LC84-10 CPLD. I broke the project into smaller mini projects. The first being reducing the srystal oscillator frequency (25 MHZ) to 1 Hz. With Cris72’s help that works fine now. I then moved to the next phase of outputting the seconds and minutes to 2 separate LED boards. This program (shown below) works fine on the simulator however when I assign pins to the seconds vector I get loads of errors stating it cannot route all pins. Analysis and Synthesis is fine it’s a problem fitting my program into my hardware, I find it difficult to believe I have exceeded the user memory as I have not really got that many variables. Could I please trouble you for some advice on how I can overcome this problem? Thank you in advance :)

PS: I have checked the seconds on an oscilloscope and they are accurate so the program works

-- Program to output seconds and minutes on 2 led boards.

-- library declarations

library ieee;

use ieee.std_logic_1164.all;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- define input and outputs for the entity

entity binstopwatch is port(

clk_in: in std_logic;

clk_out: buffer std_logic;

secout : buffer std_logic_vector(7 downto 0);

minout : buffer std_logic_vector(7 downto 0);

clk: buffer std_logic);

end binstopwatch;

-- Internal function of entity

architecture behave of binstopwatch is

--internal 32-bit variable

signal count: integer:= 1;

signal clk_en : std_logic_vector (1 downto 0);

begin

process (count, clk_in,clk_out,clk_en)

begin

-- Required in order to convert the crystal Oscillator output to a square wave

clk_out <= not clk_in;

-- Check for rising edge of clock

if(clk_out'event and clk_out='1') then

--increment the count variable by 1

count <=count+1;

-- When count is half the clock frequency

if(count = 12500000) then

-- 0.5 Second high/low genaration

clk <= not clk;

clk_en<=clk_en + '1';

--reset count

count <= 1;

if(clk_en = "01") then

secout<=secout+1;

clk_en <= "00";

if(secout= "00111011") then

minout <=minout+1;

secout <="00000000";

if(minout = "11111111") then

minout<="00000000";

end if;

end if;

end if;

end if;

end if;

end process;

end behave;