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Altera_Forum
Honored Contributor
12 years agofir filter for fsk demodulator
Hi,
i've realized an i_q demodulator for fsk message. The frequencies for the 0 and for the 1 are spaced 400Hz; the baud rate is up 200baud. The frequencies are in the audio range (for example F0=4050Hz and F1=4450Hz). That kind of demodulator needs two Low Pass filter for the i and q components. The problem is that in order to obtain an attenuation > 3dB @ 200Hz and >40db @ 400Hz the order of filter implemented is too high (now it is 1000) and the used resources overcome the max allowable by my FPGA (i.e. Memory Bits > 400.000). Is there any way or another kind of filter that could help me? Any others ideas? Thanks a lot.... My FPGA is cyclone ep4ce619 Replies
- Altera_Forum
Honored Contributor
--- Quote Start --- Hi, i've realized an i_q demodulator for fsk message. The frequencies for the 0 and for the 1 are spaced 400Hz; the baud rate is up 200baud. The frequencies are in the audio range (for example F0=4050Hz and F1=4450Hz). That kind of demodulator needs two Low Pass filter for the i and q components. The problem is that in order to obtain an attenuation > 3dB @ 200Hz and >40db @ 400Hz the order of filter implemented is too high (now it is 1000) and the used resources overcome the max allowable by my FPGA (i.e. Memory Bits > 400.000). Is there any way or another kind of filter that could help me? Any others ideas? Thanks a lot.... --- Quote End --- so your high frequency is 4450Hz yet your symbol rate is 200 symbols/sec(baud). I don't get it. what is your sampling rate? - Altera_Forum
Honored Contributor
the sample rate i choose is 200KHz and the highest frequencies for the fsk are around 20KHz...
What about the solution of CIC? What about the solution of IIR? Let me know... - Altera_Forum
Honored Contributor
--- Quote Start --- the sample rate i choose is 200KHz and the highest frequencies for the fsk are around 20KHz... What about the solution of CIC? What about the solution of IIR? Let me know... --- Quote End --- I am lost with your figures.Let us restart: adc signal sampling rate = 200KHz f0 = 4.050KHz f1 = 4.450KHz what is that 20KHz? baud = 200, can't be IQ demod outputs: IQ demodulator downconverts to what values for f0,f1 you will need to filter the second sideband on each of I and Q after downconversion. So you need to tell us what is f0,f1 after IQ demod and what is sampling rate. - Altera_Forum
Honored Contributor
--- Quote Start --- what is that 20KHz? --- Quote End --- The frequencies for the fsk messagge are in the range 3Khz to 20Khz, so for example a message could be modulated with 4050 for F0 and 4450 for F1 and another message could be modulated with 18000 for F0 and 18400 for F1. --- Quote Start --- baud = 200, can't be --- Quote End --- the data baud rate is up to 200baud (i.e. from 40Hz to 200Hz) --- Quote Start --- IQ demod outputs: IQ demodulator downconverts to what values for f0,f1 you will need to filter the second sideband on each of I and Q after downconversion. So you need to tell us what is f0,f1 after IQ demod and what is sampling rate. --- Quote End --- I think i need 2 iq demodulator one for F0 freq and another for f1 signal,is it right? At the moment the sampling rate is 200khz... The last question is not so clear... - Altera_Forum
Honored Contributor
--- Quote Start --- The frequencies for the fsk messagge are in the range 3Khz to 20Khz, so for example a message could be modulated with 4050 for F0 and 4450 for F1 and another message could be modulated with 18000 for F0 and 18400 for F1. the data baud rate is up to 200baud (i.e. from 40Hz to 200Hz) I think i need 2 iq demodulator one for F0 freq and another for f1 signal,is it right? At the moment the sampling rate is 200khz... The last question is not so clear... --- Quote End --- ok now it is better (I also correct my questioning of baud as it will be low since each symbol will have many samples). For the case of f0 at 4050Hz and f1 at 4450 I will use demodulator to downconvert the signal midpoint [(4450+4050)/2 = 4250Hz) to zero frequency i.e. use -4250Hz (or +4250). I assume your input is real so you have a mirrored copy at +/- 4250 centres. thus the output of demodulator will consist of two images one copy around zero: 4250 - 4250 = 0 i.e. f0 becomes -200Hz, f1 becomes +200Hz) and second copy at -4250-(-4250) = -8500Hz centre You need one IQ demodulator but two filters (I/Q) to remove second copy. now you need to cut somewhere between 200Hz and 8500Hz on your sampling rate of 200Khz. For example cut at 210 and let transition go towards 8300Hz However this applies to one case of f0/f1. The worst case at 3Khz will move to 6400 so a filter that cuts at 210 and transition band till 6200 will do. I will see if I can get a sensible filter. - Altera_Forum
Honored Contributor
Your method is very interesting but i have no idea of how to implement it in vhdl (hardware blocks)
- Altera_Forum
Honored Contributor
this fir cuts at 200Hz and achieves -40dB at 6300 and should do for worst case
h = fir2(100,[0 200/200000 4500/200000 .5]*2,[1 1 0 0]); h = h/sum(h); freqz(h,1,0:.1:6300,200000) - Altera_Forum
Honored Contributor
so the next step is just to implement this kind of filter with altera megafunction (fir compiler) for example or with simulink and test the reponse of iq demod?
Thanks again - Altera_Forum
Honored Contributor
--- Quote Start --- so the next step is just to implement this kind of filter with altera megafunction (fir compiler) for example or with simulink and test the reponse of iq demod? Thanks again --- Quote End --- yes provided your IQ demod centres signal correctly by multiplying by relevant frequency. The filter here is meant to remove the second copy(not noise, though it helps noise reduction). once filtered you are left with a signal containing periods of f0/f1 then you can work out a way to convert them to zero and one possibly from gradient of phase. - Altera_Forum
Honored Contributor
additionally you can design your fir as decimator since your 200KHz can be reduced right to 2*20 = 40KHz or so (say 50KHz) then you have decimation factor of 200/50 = 4
hence your filter mults will go down to 26 per filter