Discuss the issue of PCIe

Hello everyone, I would like to discuss a problem related to PCIe transmission:

I use stratix10 PCIe for avmm IP to transfer image data to CPU. The data is first written into DDR and then a frame of data is read to FIFO. After the frame is filled, an MSI interrupt is initiated to CPU. Upon receiving the interrupt, CPU set the PCIe descriptor and configure PCIe registers to execute DMA transfer through the PCIe DMA mover. Once the data described by a descriptor, which is a frame of data, is transferred, the PCIe module will automatically initiate another interrupt to notify the CPU that the transfer is complete and the CPU can retrieve the uploaded data. Due to the high speed of PCIe transmission, X4 theoretically has a bandwidth of up to 30G, so after this DMA transfer is completed, the next frame of data is being prepared. Once the next frame is ready, the previous steps are repeated to continuously upload frame by frame.

However, there is a problem with this process. Although the bandwidth of PCIe is large,Perhaps other processes or interrupts are affecting its response speed to this interrupt.the CPU may not respond to interrupts promptly. For example, if the data in the FIFO is ready and an interrupt is issued to tell the CPU to make DMA mover work, but the software does not respond to the interrupt right away, the FIFO may become full and the next frame of data will arrive, resulting in the loss of the next frame of data. Does anyone have any good ideas for handling this situation?