DE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA

#include <linux/module.h>

# include <linux/irq.h>

# include <linux/interrupt.h>

# include <linux/kernel.h>

# include <linux/gpio.h>

static int gpio_number = -1;

irqreturn_t gpio_isr(int this_irq, void *dev_id)

{

printk("Interrupt happened at gpio:%d\n", gpio_number);

return IRQ_HANDLED;

}

static void __exit gpio_interrupt_exit (void)

{

free_irq(gpio_to_irq(gpio_number), 0);

return;

}

static int __init gpio_interrupt_init (void)

{

int r;

if (gpio_number < 0) {

printk("Please specify a valid gpio_number\n");

return -1;

}

int irq_number = gpio_to_irq(gpio_number);

r = request_irq(irq_number, gpio_isr, IRQF_DISABLED, 0, 0);

if (r) {

printk("failure requesting irq %i\n", irq_number);

return r;

}

return 0;

}

MODULE_LICENSE("GPL");

module_param(gpio_number, int, 0);

module_init(gpio_interrupt_init);

module_exit(gpio_interrupt_exit);

This example code it´s in the SoC EDS installation folder C:\altera\15.1\embedded\examples\software (For Linux )

Hello Nachodizz990,

Thank you very much for the prompt reply with very concrete code example, which would be very useful in my case.

Regarding the system on HPS, there is original Linux version 3.13.0-00298-g3c7cbb9-dirty (root@matthew) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) ).

Since I am beginner in Cyclone V SoC, nothing was changed on my DE0-Nano-SoC board, I use orginal SW on my board and PC. Therefore, I have additional maybe a silly question to you:confused: about header files used in your C code:

# include <linux/module.h>

# include <linux/irq.h>

# include <linux/interrupt.h>

# include <linux/kernel.h>

# include <linux/gpio.h>

I have complete installation of:

1) Altera 15.1.0.185 Standard Edition, including Quartus Prime and SoC Embedded Design Suite (EDS) 15.1.0.185 under Win7

2) ARM DS-5 v5.22.0 under Win7,

However, I cannot find above files: module.h, irq.h, interrupt.h, kernel.h, gpio.h. Where I can find them to install on my PC in order to compile succesfully your C code?

C:\altera\15.1\embedded\embeddedsw\socfpga\prebuilt_images\kernel_headers\include\linux

All these files and all you need is inside the EDS suite.

The nano soc manual shows you how cross compile with the shell but i work and program in ds5 eclipse because you can acces the linux terminal, explore the filesystem and debug the programs

This pic illustrates how i work.

http://s28.postimg.org/g9ussmjml/2016_01_17_10h40_29.png

I can guide you to configure the workspace if you want!!

Dear Nachodizz990,

Thanks for the tips. My status is the following:

1. I set up Eclipse for DS-5- v5.22.0.

2. Remote Systems is set up, so the target’s files are accessible via SFTP and I have contact with my target via Terminal.

3. Debug Configuration let me run a simple hello example directly on the target with an access to his registers values using the breakpoints.

Now when I set up a new project New -> Project -> C Project with ARM Compiler 5 (DS-5 built –in) as a Toolchain, the new project folder is created with some libraries inside:

-arm_linux

-arm_linux_compact

-rw.

However there is no linux subfolder with libraries used in given source code above.

For toolchain: GCC 4.x [arm-linux-gnueabihf] (DS-5 built -in), I could find only kernel.h, but not the rest of needed files: # include <linux/module.h># include <linux/irq.h># include <linux/interrupt.h># include <linux/gpio.h>

Can you guide me step by step, which toolchain I should use to find above files?

hey sebar how are you?

In 1 hour i will post here a link to you for download a example

Probably, your problem is with the makefiles.

Before opening the project, ensure you have activated the ds5.

To launch ds5 and opening the project you may open the eds shell,type in eclipse and then press enter, never enter ds5 directly.

-Hei sebar, download your ds5 example from here, and follow the instructions,

place the folder into your DS5 workspace, open ds5 and import the project.

- Watch the project configurations, makefile etc ...

- Make some stupid change into the main.c such as adding a comment and then build all, you must not see any error, warning or file missing.

- If any error occurs you can ask to me for see what it happens.

https://www.sendspace.com/file/okshc0

Hi Nachodizz990,

Thanks for the link. I successfully imported this project, added my printf’s comments, compiled it, configured Debug Configuration..

I don’t have any errors, however nothing is output on Console except my printf comment inserted just after int main (int argc, char **argv).

After putting some breakpoints and removing “//” before “ printf("DIPSWITCHES => 0X%X\r\n",dipsw_value );”, I see that there might be a problem with code line “dipsw_value = alt_read_word(DIPSWITCH_address);” since uncommented line “printf("DIPSWITCHES => 0X%X\r\n",dipsw_value );” is never executed, the system freezes. Question should I build a system in QSYS first, in order to generate and provide soc_system.h?

yes, compile your quartus project, i supose that you have 1 pio for the leds,other pio for the dipswitches, and at the top entity you send the fpga pins to the exported conduits in the qsys top module.

then one compiled you must to create your hps.h, for doing this, after compiling the project copy your sopcinfo to the nios eds shell folder, open the nios

shell and tipe in sopc-create-header files, you must se your new hps.h file and some .h more

Go to the DS5 proyect, remove all the header files and then paste only your new hps.h

Make some dummy change and then compile, if your quartus system is fine, this should be work (remember ro substitute your PIO names IN THE FNCTIONS I CREATED)

If you have some problems send me the quartus project and i will send you a .rar with both quartus and ds5 projects working

Sebar, this is a most correct and easier way to map peripherials.

Note the differences with the project i sent you

//LWAXI# define LWAXI_FPGASLAVES_OFST ( 0xFF200000 ) //BASE ADDRES HPS2FPGA LIGHTWEIGHT_AXI# define LWAXI_SPAN ( 0x00200000 ) //IS 2MB WIDE

volatile unsigned long *DIPSWITCH_address=NULL;

//AXI

//#define AXI_FPGASLAVES_OFST ( 0xC0000000 ) //BASE ADDRES HPS2FPGA AXI INTERFACE

//#define AXI_SPAN ( 0x3C000000 ) //IS 960MB WIDE

int main(int argc, char **argv) {

void *LWAXI_virtual_base;

//void *AXI_virtual_base;

int fd;

// Open the kernel driver to memory

if( ( fd = open( "/dev/mem", ( O_RDWR | O_SYNC ) ) ) == -1 ) {

perror( "dev/mem" );

return( 1 );

}

//Map the physical address of the LIGHTHPS2FPGA AXI INTERFACE from start to end

LWAXI_virtual_base = mmap( NULL, LWAXI_SPAN, ( PROT_READ | PROT_WRITE ), MAP_SHARED, fd, LWAXI_FPGASLAVES_OFST );

//MAP ERROR

if( LWAXI_virtual_base == MAP_FAILED ) {

perror( "mmap" );

close( fd );

return( 1 );

}

//Map the DIPSWITHCHES PIO

DIPSWITCH_address = LWAXI_virtual_base + ( ( unsigned long ) ( DIPSWITCH_BASE) );

alt_read_word(DIPSWITCH_address);

// UNMAP LIGHTWEIGHT HPS2FPGA AXI

if( munmap( LWAXI_virtual_base, LWAXI_SPAN ) != 0 ) {

perror( "munmap" );

close( fd );

return( 1 );

}

close( fd );

return( 0 );

}

but the best way to do this is in a final application is to make a driver

https://zhehaomao.com/blog/fpga/2013/12/29/sockit-4.html