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Altera_Forum
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10 years ago

DE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA

I designed a block in Verilog. When data processing is finished, this FPGA block sends an interrupt signal to HPS using one of dedicated interrupt line: f2h_irq0 or f2h_irq1. The question is how HP...
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Altera_Forum
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10 years ago

C:\altera\15.1\embedded\embeddedsw\socfpga\prebuilt_images\kernel_headers\include\linux

All these files and all you need is inside the EDS suite.

The nano soc manual shows you how cross compile with the shell but i work and program in ds5 eclipse because you can acces the linux terminal, explore the filesystem and debug the programs

This pic illustrates how i work.

http://s28.postimg.org/g9ussmjml/2016_01_17_10h40_29.png

I can guide you to configure the workspace if you want!!