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Altera_Forum
Honored Contributor
10 years agoDE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA
I designed a block in Verilog. When data processing is finished, this FPGA block sends an interrupt signal to HPS using one of dedicated interrupt line: f2h_irq0 or f2h_irq1. The question is how HP...
Altera_Forum
Honored Contributor
10 years agohey sebar how are you?
In 1 hour i will post here a link to you for download a example Probably, your problem is with the makefiles. Before opening the project, ensure you have activated the ds5. To launch ds5 and opening the project you may open the eds shell,type in eclipse and then press enter, never enter ds5 directly.