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Altera_Forum
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10 years ago

DE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA

I designed a block in Verilog. When data processing is finished, this FPGA block sends an interrupt signal to HPS using one of dedicated interrupt line: f2h_irq0 or f2h_irq1. The question is how HP...
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Altera_Forum
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10 years ago

yes, compile your quartus project, i supose that you have 1 pio for the leds,other pio for the dipswitches, and at the top entity you send the fpga pins to the exported conduits in the qsys top module.

then one compiled you must to create your hps.h, for doing this, after compiling the project copy your sopcinfo to the nios eds shell folder, open the nios

shell and tipe in sopc-create-header files, you must se your new hps.h file and some .h more

Go to the DS5 proyect, remove all the header files and then paste only your new hps.h

Make some dummy change and then compile, if your quartus system is fine, this should be work (remember ro substitute your PIO names IN THE FNCTIONS I CREATED)

If you have some problems send me the quartus project and i will send you a .rar with both quartus and ds5 projects working