Hallo Everybody, I would like you guys to suggest a solution for the problem below: I have successfully updated the hardware and software configurations of my project on the EPCS device and have tested the device by resetting it. Everything works perfectly. Now I did my experiments with the Nios II flash programmer. And there were no problems. now considering a situation where a connection through the jtag interface is not available, i would like to perform the update also through a fieldbus or ethernet. i have already read up on preparing the configuration files to be written to the flash (elf2flash, sof2flash). i can also transfer the files and store it in the flash memory. now my question is, if i am using the default epcs boot copier, do i write the fpga configuration first and then the software application, one after the other on to the flash?? or is there a specific rule, how i store these files on to the flash memory? If there are any other posts or documentation that I can read with respect to this issue, please let me know. Thank you very much Cheers kaushik.

Have you already read AN521 ? Moreover, if you search the forum for "remote update" you'll find a lot of threads on this subject. For example this one: http://www.alteraforum.com/forum/showthread.php?t=20623

Thank you very much for the reply. I have read the AN521 already and from your post I have read the related topics from other posts. I have achieved in successfully copying the required firmware files on to the Flash device. But now when I reset it it would not start. And I am guessing it has something to do with the Bootloader. I would like to first use the default bootloaders from Altera. the question is where should i specify which bootloader i would be using. should i be integrating the bootloader in to the sof or the elf file or should i copy it reperately to the epcs on-chip rom.

The bootloader is part of the EPCS controller integrated in the SOPC/QSys system. Just point the Nios CPU's reset vector to the EPCS controller and the bootloader will load the .elf file from the flash. The bootloader will jump over the .sof image, so the .elf just needs to be placed after the FPGA image in the flash. What file format are you using when you send data to your application, and how do you write it to the EPCS? The easiest format is probably .rbf, but IIRC with the EPCS flash you need to revert the bit order of every byte before you write them.

The bootloader is encapsulated in the fpga configuration, namely in the sof file. When you add a epcs controller, the default bootloader is automatically added to the project and built in fpga configuration. You should have a epcs_controller_boot_rom.hex in your Quartus project directory; if I recall correctly this is the default name associated to epcs, but you can change it in Quartus settings or in Qsys. If you need a custom bootloader you simply change the file and rebuild fpga. When you regenerate the Qsys component including epcs controller, the hex file is automatically overwritten with the default one. So you must pay attention to replace it with the custom version whenever you change anything in Qsys.

Thank you for the reply. Regarding my firmware files, here is how I prepare them: 1. I use the Nios II Command shell, to generate the hardware and software firmware files using sof2flash and elf2flash. 2. Then I comvert them in to the .bin files. 3. Finally I concatenate them. I am using ADS over EtherCAT protocol to transfer the files in segments to the device and then use the stand Altera flash access functions to write the file on to the flash starting from offset 0x00000000. So far this has not worked. What am i doing incorrectly here??

Cyclone IV and Nios II Firmware Update | Altera Community

24 Replies

Altera_Forum
Honored Contributor
13 years ago
If you still have not successfully booted your software from flash, I highly recommend you use the --after tag. Is there a specific reason why you aren't using it?

You might want to check out http://www.alteraforum.com/forum/showthread.php?t=27981 (http://www.alteraforum.com/forum/showthread.php?t=27981). This thread has someone fighting to get the same sort of setup you are hoping for.
Altera_Forum
Honored Contributor
13 years ago
@kosh271 -- Actually i am using the After tag.. Since I am not getting the desired results with that.. I am thinking of not using it in my next attempt. My hardware and software flash files have been concatenated to become a single .bin file.. So the software data is obviously after the hardware file.. So I dont how the after tag makes sense here..

and the link you provided does not actually explain the same problem.. I am not using the NIOS2 flash programmer at all.. My Flash files find their way to the Flash using a fieldbus protocol. Do you have any links that explain this process?? or Methods to boot and update firmware without using the JTAG connection...
Altera_Forum
Honored Contributor
13 years ago
In the default development process,the bootloader load firmware(elf) from the address just after the sof file,because the bootloader can calculate the size of sof file.The default development process can be used to develop factory image(include sof and elf file and sof file offset in EPCS is 0x0).For user image(the sof and elf file offset in EPCS is user defined) you can use the bootlaoder generated by programe which download from the alterawiki.

In default development process, the"--after" option can make the flash file generated from elf have an offset in EPCS, the offset is the size of sof file. flash file contain the address infomation in it's formate.
Altera_Forum
Honored Contributor
13 years ago
--- Quote Start ---
If I am comparing the flash contents, its all a bunch of ones and zeroes.. How do I know, what exactly went wrong??
--- Quote End ---
There are some tools that can be used to compare flash files. IIRC the "verify" option in the Quartus programmer will just tell you "failed" if there is a difference, without telling you more information. But if you read back the flash contents and use a tool such as srec_cmp from the srecord package (http://srecord.sourceforge.net/) can give you more information about differences between to flash files.
Altera_Forum
Honored Contributor
13 years ago
Here is another question:
I am writing the complete concatenated bin-file in to the flash with one single flash write function. That means that the hardware and the software firmwares are actually placed one after the another irrespective of the "Blocks" in the flash. Do I need to worry about this??

I mean, should I first write the hardware firmware and if it ends in the middle of a flash block, then start writing the software firmware in the next block??

I would like to thank all of you for your previous answers..
Altera_Forum
Honored Contributor
13 years ago
Hey Guys,

I have another question. The EPCS bootloader sources that i found in my NIOS installation folder, only contain files up to Cyclone III. I mean, the Cyclone III bootloader file is automatically added to my Quartus EPCS configuration, but I use a Cyclone IV device. Is this bootloader, basically compatible with the Cyclone IV device??

Thanks.
Altera_Forum
Honored Contributor
13 years ago
About your first question, the software should be written into the flash just after the FPGA image. AFAIK the bootloader isn't block aware, and will just get the FPGA image size from it header in the first few bytes, jump over it and start reading the elf image.
For your second question there isn't any significant difference in that area between the Cyclone III and IV so it should work. I have several projects here on Cyclone IV with the standard EPCS boot loader and they boot fine.
Altera_Forum
Honored Contributor
13 years ago
Thanks Daixiwen for your answer..

I cannot still get the software to boot.. It got me thinking. I looked at the nios2-flash-programmer logs and the flash programmer actually adds a little more data to the nios2 firmware before it copies it into the location after the hardware firmware.

I mean, do I need to add something like address information, or pack the .bin file in to a Boot record before I flash it. If yes, then could you please give me a example??

Thanks a lot.
Altera_Forum
Honored Contributor
13 years ago
as far as I know the only thing the flash programmer does is convert the elf file to a srec file before flashing it. As long as your binary file has the same contents than this srec file it should work.
How do yo generate your binary file to flash?
Altera_Forum
Honored Contributor
13 years ago
I transfer the bin file to my device through ADS over EtherCAT protocol. I have checked at the receiving end if there is any dataloss but the data is intact. And then I use the alt_write_flash function to write the whole data in to my flash device with offset as '0' and length equal to the my file size.

Please find below the commands that I use to convert my flash files to a bin file. Are they alright??

sof2flash --input=widrive.sof --output=widrivehardware.flash --epcs --verbose

elf2flash --input=drive_fpga.elf --output=widrivesoftware.flash --epcs --after=widrivehardware.flash --verbose

nios2-elf-objcopy -i srec -o binary widrivesoftware.flash softwarefirmware.bin"

nios2-elf-objcopy -i srec -o binary widrivehardware.flash hardwarefirmware.bin"

cat softwarefirmware.bin hardwarefirmware.bin > firmware.bin

Forum Discussion

Cyclone IV and Nios II Firmware Update

24 Replies

Recent Discussions

Agilex 5 FPGA EMIF: sharing LPDDR4 reference clock between Bank 3A and Bank 3B

There are distinct scratches on the BGA substrate, extending beneath the solder balls.

EP4CE30F23C8N scratches

The DC_FIFO issue of Cyclone 10 GX devices

MT25Q512 Programming Issue When Connected to Cyclone 10CX150Y