Forum Discussion
Occasional ContributorCyclone III slave (PS) embedded memory errors
I think I've found the problem.
There is a trace connected to pin 76 on the master and pin 99 on the slave. Trace is pulled up to 3.3V via 2.2k
This **bleep** resistor was dead, and the trace was actually floating.
I didn't use this pins before, so I can't reveal the resistor is dead.
As I start to use it, all logic became a total mess. Something worked, something not. By elimination I found the culprit.
I can't explain how this trace connected with loading errors (when FPGA not even in user mode), but the fact is - replacing resistor solved all problems, ROMs working now (though I don't use them anymore).
Thanks to all, problem solved!
Occasional ContributorThere is the ROM1 content in the slave after power up:
Then I do "Import data from the file" and use the same .mif file used for ROM init:
Red numbers shows the differences. Then "Write data to in-system memory", read it back again, and "Import data from file" again:
As you can see, all numbers which were red, now are consistent with actual .mif file.
Frequent Contributorhi @Vic3Dexe ,
scope shot from oscilloscope is required so we know what happened in the trace DATA and DCLK. can you share that
thanks,
- Vic3Dexe
No problem as soon as someone share oscilloscope to me.
Where exactly you need traces? AS_DCLK/AS_DATA or SOUTH_DCLK/SOUTH_DATA (after buffers)?
I've cut traces and placed series resistors afters buffers (51R). Should I remove them before measurement?
- hareesh
it's better to share at two points and one time measure with resistors and another time with out.
on data line and clk line are you using 51R resistor only ?
- hareesh
- Vic3Dexe
Awaiting access to my friend's oscilloscope (it's in use for now). Don't know when it will be avail. Maybe this week, maybe next.
