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BrianSune_Froum's avatar
BrianSune_Froum
Icon for Contributor rankContributor
3 days ago

Cyclone 5 SoC FPGA Bank Supply Prerequisite

Dear Altera Support Team,

I am not sure this is correct and did not found much info on Handbook.

Device 5CSXF6C6U23

CASE 1: BANK 5A 5B only supplied VCCPD to 2.5V and VCCIO is floated.
JTAG scan chain shows both HPS and FPGA devices.
JTAG program shows failed with wrong device address.

CASE 2: BANK 5A 5B supplied 2.5V or 1.8V VCCIO.
JTAG scan chain shows both HPS and FPGA devices.
JTAG program shows successful result.

Based on the above situation: do BANK 5 must supplied VCCIO in order FPGA to work?
I don't understand, other brand FPGA do not have such requirement while VCCPD must be powered which is understandable.

Please confirm this for best and safe device HW configuration.

Thanks,
Brian

2 Replies

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi Brian,

     

    The Cyclone® V Pin Connection Guidelines state: “Connect these pins (VCCIO) to a power supply” Your test results align with the expectations, where when you left VCCIO floating, it can cause programming failure. For best and safest device hardware configuration, always connect VCCIO to the correct supply for every I/O bank, including BANK 5A/5B.

     

    Reference: Cyclone® V GX, GT, E, SX, ST and SE Device Family Pin Connection Guidelines

     

    Regards,
    Aqid

    • BrianSune_Froum's avatar
      BrianSune_Froum
      Icon for Contributor rankContributor

      AqidAyman_Altera​ 

      Then this is violating the HMC standard. When slot cards are not used the VCCIO could be floated and no supplied.

      I cannot see the correlation between VCCIO and JTAG program fail.

      VCCIO had nothing to do with JTAG scan unless JTAG is located in VCCIO 5A/5B.
      VCCPGM or VCCIO BANK 3 is only the possible IO bank that can affected.

      So which handbook or document have detail info on such.

      Thanks,

      Brian