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aaecl's avatar
aaecl
Icon for New Contributor rankNew Contributor
3 days ago

Cyclone 10 GX Startup Time Support

I have been utilizing Cyclone 10 GX (10CX105YF672E6G) FPGA for some time but now I require the FPGA to startup and run as fast as possible, I know there is a hard limit caused by flash communications or power sequencing, but I would like to know if there is anyway I could cut the startup time further, each 1ms would cause a difference, so if there are any documented or undocumented workarounds or tricks that could support this it would be fantastic. 

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quality|reliability

1 Reply

  • Farabi's avatar
    Farabi
    Icon for Regular Contributor rankRegular Contributor
    1 day ago

    Hello, 

     

    Here are some recommendation to minimize the bootup time. 

    1- use fast flash - ASx4 or FPPx8 Flash is fastest

    2- compress bitstream - can reduce up to 60% of original bitstream size

    3- increase flash clock frequency - 100 to 166MHz if possible

    4- optimize power ramp up time - VCC/VCCPT/VCCA can go as fast as 1-2ms(normal 5-10ms) while still meeting the spec

    5- use Fast POR mode

     

    regards,

    Farabi