I am a rookie. I am working on my fourth MAX II design. I am using Quartus II Version 9 SP2. The problem I am having is that several pins on EPM1270 do not work. For example. I have four test pins I use for debugging. If I connect the clock to all four of these pins (set up as outputs), the oscillator signal only comes out of one of the four test pins. (There are probably other pins that are not working, but I haven't found them yet.) This seems like a Quartus problem to me. I would appreciate any advice. Especially, is there a file that I can delete that will ensure a complete re-build? Thank you for any constructive suggestions. John

Generally, deleting the db directory resets all previous compilation results. Although there's always a possibility of revealing new Quartus bugs, your obervation sounds somewhat unlikely in my opinion. You didn't tell about your design implementation method, but you have the option to check the Place&Route result in the Technology Map Viewer.

--- Quote Start --- I am a rookie. I am working on my fourth MAX II design. I am using Quartus II Version 9 SP2. The problem I am having is that several pins on EPM1270 do not work. For example. I have four test pins I use for debugging. If I connect the clock to all four of these pins (set up as outputs), the oscillator signal only comes out of one of the four test pins. (There are probably other pins that are not working, but I haven't found them yet.) This seems like a Quartus problem to me. I would appreciate any advice. Especially, is there a file that I can delete that will ensure a complete re-build? Thank you for any constructive suggestions. John --- Quote End --- Hi John, there a lot of possibilties why your design isn't working. 1. Your board or your MAX devcie is broken Is it a new board or did you have run a design on it in the past ? Can you assign your output to other pins ? ... ... 2. Your design Did you check that the clock is really connected to the outputs ? Use the Quartus Tech View for checking. .... .... 3. Quartus Did you check your pin assignment ? Are the output assigned ?? One way to force Quartus to re-build the database is to delete the db folder. Kind regards GPK

Thanks to both of you for your suggestions. I will try them today. I certainly don't expect that it would be a problem with Quartus, but it seems so strange. I worked with Quartus quite a bit about a year ago and never had any problems like this. It is a new board. All the pins are assigned correctly. Again thank you. John

--- Quote Start --- Thanks to both of you for your suggestions. I will try them today. I certainly don't expect that it would be a problem with Quartus, but it seems so strange. I worked with Quartus quite a bit about a year ago and never had any problems like this. It is a new board. All the pins are assigned correctly. Again thank you. John --- Quote End --- Hi John, is it possible that the board itself is the problem ? An easy way to check what Quartus did with your design is to look into the RTL or Technology View. Kind regards GPK

Yes, it is certainly possible that there is something wrong with the board. But I have already verified about half of the functionality of this FPGA design. These test pins are only routed directly to Test-points on the board. (They are not connected to multiple places.) Also I have had correct signals on these test pins earlier. Then several pins stopped working. Since I didn't know I could delete the db folder, I created a new design and re-drew the TOP block. I thought that had fixed the problem. I am currently looking at the Technology Map Viewer, and all pins are shown correctly. Thanks for your continued assistance. John

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15 Replies

Altera_Forum
Honored Contributor
16 years ago
According to your posts, it's not clear, if you checked the connection of the said pin in the physical map. Most compiler (or user code related) errors would reveal there.

You can also post your test design as a Quartus archive (*.qar file).

If you assume, that's a Quartus bug, contact Altera support.
Altera_Forum
Honored Contributor
16 years ago
the first task is to identify the problem is of hardware or of software.

if you have another same type of pcb, you can try that pcb.

if the same problem existed on that pcb. it is the quartus software's problem.

if the problem is not same or problem disapear, the problem is pcb.

sometime the cpld's some pins will be damaged by static electricity,but other pins are good.
Altera_Forum
Honored Contributor
16 years ago
I do not think that it is a Quartus problem.

I am having another board built to see if I can duplicate the problem on a second board.

It seems like it is related to my design, but I have not been able to prove that.

Thank you for continued support.

John
Altera_Forum
Honored Contributor
16 years ago
--- Quote Start ---
I do not think that it is a Quartus problem.

I am having another board built to see if I can duplicate the problem on a second board.

It seems like it is related to my design, but I have not been able to prove that.

Thank you for continued support.

John
--- Quote End ---

Hi John,

can you post your project in the forum ?

Kind regards

GPK
Altera_Forum
Honored Contributor
16 years ago
I would prefer not to post it for security reasons. Howver, if I don't make progress in the next day or two, I will sanitize it and put it up.

Regards- John

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