Avalon-ST configuration with Agilex 3 fails

Hi Sleh,

Thank you for sharing the timing captures and details.

From your description, the key symptom is that during the first configuration attempt after power‑up, nSTATUS follows nCONFIG exactly. This usually happens when the FPGA is not yet ready to accept configuration data. After the first failure, all later attempts work, which supports the idea that the internal configuration logic is only ready after a short time delay.

Based on this behavior, it is worth to check this KDB: https://community.altera.com/kb/knowledge-base/why-does-configuration-fail-to-recover-after-unsuccessful-initial-configuration-/343475

Here are a few things you can try:
1. Add a delay before starting the first configuration after power‑up. For example, wait 10–50 ms before driving nCONFIG low.

2. Check all power‑on timing and ensure the rails are stable before pulling nCONFIG low.

3. Verify pull‑ups on nSTATUS, CONF_DONE, and nCONFIG, since weak pull‑ups can cause the first cycle to fail. 

4. Make sure there are no glitches on nCONFIG during power‑up.

5. Ensure the CPU always completes the full configuration cycle, even in the failed case. Incomplete cycles can leave the device in a stuck state, as you already observed. 

If adding a delay before the first cycle improves things, that would confirm that the issue is related to power‑up readiness.

Regards,
Fakhrul