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LFrin's avatar
LFrin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
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Arria 10: Booting U-Boot from SD-Card does not configure FPGA

Hello,

I have adapted the example for the Arria 10 SOCDK (Arria 10 SoC - Boot from SD Card) to the HAN-Pilot-Platform evaluation board from Terasic. I used the make_sdimage_p3.py script to generate the SD-Card image without linux binaries:

Partition 3: (format raw, type 0xA2) - u-boot-splx4.sfp
Partition 1: (format fat) - sdfs folder with - fit_spl_fpga.itb and u-boot.img
Partition 2: (format ext3) - empty

The SOC start-up seems to be ok, but the FPGA does not get configured:

Boot Console Arria 10 SOC

When i start the board without SD-Card, put it in, and then connect with the debugger and start the system with the Debugging U-Boot script. The system boots and the FPGA gets configured…

The start-up runs like from SD-Card, but the FPGA gets configured!

Some more informations:

  1. Quartus (22.3 Pro) compilation with “Early Release of HPS IO”
    1.1 Qsys EMIF with enabled “Early Release Mode”

  2. Convert .sof to .rbf with: quartus_cpf.exe --convert --hps -o bitstream_compression=off golden_top.sof golden_top.rbf

  3. Make fit_fpga_spl.itb with fit_fpga_spl.its in \u-boot-socfpga\board\altera\arria10-socdk

I recompiled U-Boot with #define DEBUG in include\configs\socfpga_common.h and found these error:

…
No configuration specified, trying default…
Found default configuration: ‘config-1’
FPGA: FPGA node count: 2
FPGA: fpga-periph-1
FPGA: fpga-core-1
FPGA: Start to program core bitstream …
FPGA: Data offset was found.
Can’t get ‘load’ property from FIT 0xffe24ec0, node: offset 248, name fpga-core-1 (FDT_ERR_NOTFOUND)
FPGA: No loadable was found.
FPGA: Using default DDR load address: 0x400 .
FPGA: External data: offset = 0x582d4, size = 0x1dcfb44.
blk_find_device: if_type=6, devnum=0: [email protected], 6, 0
…

Does anyone have any idea what the problem could be?

  • LFrin's avatar
    LFrin
    3 years ago

    Hi @aikeu,

    okay, now im sure: The Intel In-System Sources and Probes IP hinders the FPGA from starting normally after it has been correctly configured by SD-Card. Even the old Quartus-Project works without the ISSP-IP. Now it makes sense why the FPGA starts when a connection to the programmer is established via JTAG or similar.

    My workaround will be, that i only use FPGA Firmware without the debugging features (ISSP, SignalTap, ...) on the SD-Card and when i need this debugging features i will start the HPS with the ARMD DS debugger.

    Thanks for the help, my problem has been solved.

    Regards,

    LFrin

22 Replies

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  • LFrin's avatar
    LFrin
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi @aikeu,

    yes both items are checked for the early io build (i worked with this manual).

    • LFrin's avatar
      LFrin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hi,

      Okay, I found something strange. I think that the FPGA is programmed correctly, but does not start.

      As soon as I do anything on the JTAG interface after booting my custom U-Boot SD-Card (Quartus-Programmer-Autodetect/ARM-DS-Debugger/Insert external USB-Blaster/...) the FPGA starts running normally.

      The board has an on-board USB-Blaster-II, I'm afraid this somehow prevents the FPGA from starting. However, I have no idea why and especially I do not know why the supplied SD-Card-Image works without this problem.

  • LFrin's avatar
    LFrin
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi @aikeu,

    The SW5 (MSEL) Dipswitch is switched to 000 - FPP Mode - FPGA boot from Micro SD Card. I can boot the sample SD-Card-Image provided by Terasic and the FPGA is configured.

    Unfortunately the configuration of the FPGA does not work when I use this and this guide to create U-Boot device settings (suitable for HAN-Pilot-Platform) myself to create an SD card image.

    The Secondary Program Loader (SPL) and U-Boot are booting without any problems, the DDR memory is calibrated and I get into the U-Boot console. The only thing that does not work is the configuration of the FPGA.

    Is it possible that by using the ARM-Development-Studio-Debugger, the .itb file, where the FPGA firmware is stored on the SD card, is loaded differently? I find it extremely strange that it works when I start the boot process using the debugger.

    Is there another way to debug the programming process of the FPGA?

    Are there any special requirements for the HPS2FPGA bridge if you want to configure the FPGA via the HPS?

    • LFrin's avatar
      LFrin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      The problem also exists when I work without "HPS early release of HPS IO". I convert the *.rbf file with the attached script and create my SD-Card as usual. The process hangs at "FPGA: Start to program peripheral/full bitstream ...".

      I also found that it is enough to connect the ARM DS debugger, stop the ARM and reset it so that the FPGA is configured correctly.

      The ARM loads from the SD-Card: SPL and U-Boot load correctly, FPGA is not configured. I connect to the ARM DS debugger and run the following script:

      # initialize system
      stop
      wait 5s
      reset
      stop
      wait 5s

      FPGA is configured correctly.

  • aikeu's avatar
    aikeu
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi LFrin,


    Seems that it stucked at trying to perform DDRCAL, it will shows DDRCAL failure after some time if I am correct.

    Maybe as you mentioned the pre-built sd image not fully suitable. Anyway can make sure that the SW5 MSEL of your board is already configured to boot from sd card, refering to the HAN Pilot Platform Hardware Manual?


    Thanks.

    Regards,

    Aik Eu


  • LFrin's avatar
    LFrin
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi @aikeu,

    >> You mentioned that you wanto use the new building boot loader flow? The flow will be the same for all Arria10 family devices

    I meant that the example project from Terasic was built with Quartus 18.1 and the SOC EDS and I work with 22.3 and U-Boot.

    >> I think the pre-made one can work, try to checkout and see.

    I will try this and then report back.

  • aikeu's avatar
    aikeu
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi LFrin,


    I think the pre-made one can work, try to checkout and see.

    You mentioned that you wanto use the new building boot loader flow? The flow will be the same for all Arria10 family devices


    Thanks.

    Regards,

    Aik Eu


    • LFrin's avatar
      LFrin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hi @aikeu,

      Unfortunately, the pre-made SD card you mention does not work. U-Boot starts booting but then gets stuck:

      Boot Console Arria 10 SOC Intel SoCDK Preebuild SD-Card

    • LFrin's avatar
      LFrin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hi @aikeu,

      I only have the evaluation board Han-Pilot-Platform from Terasic and not the Arria 10 SoC Development Kit.

      I don't think I can use the pre-made sd-card image from the link, or am I wrong?

      I load the Terasic prebuild Image Linux LXDE Desktop (Kernel 4.9.78-ltsi) to my SD-Card and the configuration of the FPGA worked as expected:

      Boot Console Arria 10 SoC Terasic Prebuild SD-Card

      They used the old boot-flow in their reference designs, but i need to use the new U-Boot flow, because I want to start the new development with a current Quartus version.

      I am running out of ideas why the FPGA is not configured when booting directly from the SD card, but it works when I use the debugger.