[Agilex]:Testing AVST Mode using HPS

Hi raju1421,

May I know what specific Agilex board that you are using?

I will try to find more information about that.

Thanks.

Regards,

Aik Eu

Hi raju1421,

Can check out the below document related to Avalon ST application for Agilex.

https://www.intel.com/content/www/us/en/docs/programmable/683673/21-3/avalon-st-configuration.html

Thanks.

Regards,

Aik Eu

Hi raju1421,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu

Hi raju1421,

Referring to the document Overview block diagram to generate the jIC file:

https://www.rocketboards.org/foswiki/Projects/AgilexSoCWithEMMCStorageOnHPS?erpm_id=10745833_ts1687143844482#Writing_the_QSPI_Image

For the GHRD, you will set the device configuration scheme for AVST and compile it in quartus.

The AVST works on the FSBL only but not the SSBL. When generating the .jic file for flashing the qspi flash change the mode to AVST setting according to the configuration scheme instead. Example: -o mode=AVSTX32

Thanks.

Regards,

Aik Eu

Hi raju1421,

I will close-pending this case if no further question.

Thanks.

Regards,

Aik EU