Occasional ContributorIf I am not using the PMBus Power Management function can I leave the following pins unconnected :-
PWRMGT_SCL, PWRMGT_SDA, PWRMGT_ALERT
Also what about the CvP_CONFDONE pin if we are only ever going to us AS configuration ?
Occasional ContributorI would also like to ask about AS_nCS03 can we leave it floating since we are using only a single QSPI device ?
Regular ContributorHi,
May I know which device part are you using? If you are using smartVID part then this need to be connected.
Regular ContributorAre you using CVP?
Occasional ContributorWe will be using one of the following devices : A5EC008BM16AI4S, A5EC013BM16AI4S or A5EC028BM16AI4S - and we will not be using smartVID ! For the CvP_CONFDONE I found a note in the Quartus software when defining the options for the "Configuration Pin Options" that if not used then "can be used as a user I/O" thus I assume it CAN BE left N/C. I couldn't find this info in the Intel Docs - which is a shame !
I still need to know about AS_nCSO3 pin, PWRMGT_SCL & PWRMGT_ALERT/SDA(this is a shared pin with SDM_IO12).
Regular ContributorHi,
AS_nCSO3 pin, PWRMGT_SCL & PWRMGT_ALERT/SDA pin can be left floating if it is unused.
Occasional ContributorWhere is this documented ?
Regular ContributorHi SDavi9,
As mentioned in above reply, AS_nCSO3, PWRMGT_SCL, PWRMGT_SDA, PWRMGT_ALERT, and CvP_CONFDONE are all safe to leave unconnected when their corresponding features are not used, per the SDM_IO unused‑pin rules.
• CvP_CONFDONE – Listed as an optional SDM signal in Table 14 – SDM Optional Signal Pins, and optional signals only require connection when used. Unused SDM_IO pins default to weak pull resistors and may remain N/C. (Document pp. 33–37) Pin Connection Guidelines Agilex™ 5 FPGAs and SoCs
• AS_nCSO3 – Part of AS x4. The AS×4 “Unused Configuration Pins” table shows unused SDM_IO pins (including SDM_IO8 / AS_nCSO3) can be left unconnected. (Document pp. 44–45) Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs
• PWRMGT_SCL / PWRMGT_SDA / PWRMGT_ALERT – These SmartVID/PMBus signals are optional in Table 14 – SDM Optional Signal Pins. If SmartVID is not used, these pins do not require connection and may float. (Document pp. 33–37) Pin Connection Guidelines Agilex™ 5 FPGAs and SoCs
The SDM_IO pins follow a global rule documented in the “Unused Configuration Pins” in the document.
This applies to all optional SDM signals unless explicitly stated otherwise (e.g., MSEL pins, nCONFIG, nSTATUS).
Regards,
Fakhrul
