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Occasional ContributorAfter watchdog for dual-config is enabled, the FPGA seems like not work properly every dozens of seconds. Why?
FPGA communicates with another FPGA with PHY chip. Normally(watchdog enable checkbox not checked), the PHY link led is always off when communication is good. While after I enble watchdog for dual-config(watchdog enable checkbox checked) and set watchdog value to any value, the link led will be on for about 2 seconds and return to be off. This will also be repeated after dozens of seconds. Why? How will I use the watchdog for dual-config? I didn't run remote update after power-up and the FPGA just run application firmware(just ethernet communication with another FPGA using PHY chip).
Attached file is my fpga code for the dual-config.
54 Replies
JohnT_AlteraRegular Contributor
Hi,
The write data X"00000003" will assert both trigger reconfiguration and reset the watchdog timer. The write data should be X"00000002" as this will set the bit 1 reset watchdog timer only.
KWang97At the end of the code, I reset watchdog together with set reconfig by assigning sl32avmm_rcv_writedata <= X"00000003"; Is this not right?
slavmm_rcv_write <= '1';
sl3avmm_rcv_address <= B"000";
sl32avmm_rcv_writedata <= X"00000003";
- JohnT_Altera
Hi,
From the FPGA code, I do not observed that you performed watchdog timer reset. You will need to assert RU_nRSTIMER since you enable the watchdog timer. Please refer to table 34 in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf in order to performed watchdog timer reset
- KWang97
my fpga code for the dual-config.
