ADC+FPGA+DAC setup for predistortion

Hi Rosanah.

You probably need a hsmc2fmc adaptor. Then you can use can pick the altera board that supports two HSMC connectors, or 1 FMC and 1 HSMC:

An adaptor can be found at:

http://www.kayainstruments.com/hsmc2fmc/

(Not a recommendation, just first one I found)

and TerAsic is the primary source for altera boards.

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=56&no=756

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=139&no=745

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=167&no=843

There are others, all the way up to dual Stratix V boards, depending on how much FPGA horsepower you need.

www.terasic.com

Hi Rosanah,

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I am looking to buy the ADC12J4000EVM and DAC38J84EVM from TI. Both have an FMC connector and JESD204B interface. I am looking for a setup for predistortion and I would like to if there are any altera FPGA's that can communicate with both the dac and adc simultaneously.

--- Quote End ---

Altera and TI's JESD204B support is still very new.

According to TI's documentation, their FMC interface is not completely "standard" (I haven't looked in detail at the differences).

You'd be better off sticking with TI's Arria V GZ development kit

http://www.ti.com/tool/tsw14j56evm

I looked at using the Kaya Instruments HSMC-to-FMC adapter, but the connector is missing various signals.

Since the TI kit has only one FMC site, you will need two of the boards to test your two devices.

I have one of the TI Arria V GZ kits and the ADS42JB69 JESD204B board. I have not yet started to use them, however, I'm happy to share whatever I get working, eg., custom HDL configurations and control software.

Cheers,

Dave

Hi Dave,

Do you know how to connect the two TSW14J56EVMs? I would need the two to communicate to solve for predistortion coefficients and apply them.

Thanks!

Rosanah

Hi Rosanah,

--- Quote Start ---

Do you know how to connect the two TSW14J56EVMs? I would need the two to communicate to solve for predistortion coefficients and apply them.

--- Quote End ---

Your question is not very clear. Could you please clarify?

The two FPGA EVMs do not need to communicate with each other.

The ADC and DAC boards would plug into their respective FPGA boards, and you would configure the JESD204B link between the FPGA and its respective FMC board. You would then connect the ADC to DAC using an RF cable.

If you wanted to change the characteristics of the RF transmit signal, then you would simply communicate from your PC to the DAC board, and likewise, if you wanted to change the characteristics of the RF receive signal processing, then you would simply communicate from your PC to the ADC board.

There is no way for the two boards to communicate directly.

Cheers,

Dave

--- Quote Start ---

Hi Rosanah,

Your question is not very clear. Could you please clarify?

The two FPGA EVMs do not need to communicate with each other.

The ADC and DAC boards would plug into their respective FPGA boards, and you would configure the JESD204B link between the FPGA and its respective FMC board. You would then connect the ADC to DAC using an RF cable.

If you wanted to change the characteristics of the RF transmit signal, then you would simply communicate from your PC to the DAC board, and likewise, if you wanted to change the characteristics of the RF receive signal processing, then you would simply communicate from your PC to the ADC board.

There is no way for the two boards to communicate directly.

Cheers,

Dave

--- Quote End ---

Hi Dave,

I found the Arria 5 Soc Dev Kit (http://www.altera.com/products/devkits/altera/kit-arria-v-soc.html) which has 2 FMC connectors and Altera claims that their Arria 5 product line include the JESD204B IP. Do you think I could use this to simultaneously use the DAC and ADC (ADC12J4000EVM using JESD204B over FMC and DAC38J84EVM using JESD204B over FMC from TI)? My setup will be a loop with DAC +PA under test+ADC+FPGA. The FPGA will be generating test signals to the DAC, reading samples in from the ADC, comparing what was received to what was sent and perform some mathematical functions and preprocessing to what is sent.

Thanks!

Rosanah

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I looked at using the Kaya Instruments HSMC-to-FMC adapter, but the connector is missing various signals.

--- Quote End ---

Dave,

There are few differences between HSMC and FMC standards. Therefore, its impossible to design adapter that fits both standards for 100%.

KAYA's adapter board is probably fine for 95% of cases, while every engineer is responsible to validate if his requirements are within 5% or within 95%.

Cheers,

Mike

--- Quote Start ---

The ADC and DAC boards would plug into their respective FPGA boards, and you would configure the JESD204B link between the FPGA and its respective FMC board.

Cheers,

Dave

--- Quote End ---

Yo Crazy Dave,

I hope all's well.

I gave the JESD204B interface a very sparse review about 6 months ago, at the time Altera didn't have any free IP that could handle it.

Have you had a look at what's available, and is there much to getting it running?

Thanks for any thoughts,

Nial.

Hi Nial,

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Yo Crazy Dave

--- Quote End ---

"Crazy busy" ... :)

--- Quote Start ---

I gave the JESD204B interface a very sparse review about 6 months ago, at the time Altera didn't have any free IP that could handle it.

Have you had a look at what's available, and is there much to getting it running?

Thanks for any thoughts,

--- Quote End ---

No, the IP is not free. Altera has two offerings; IP by MTI and Altera's own IP. The TI examples are based on the MTI IP (since it was available first). I have not tested either IP yet. TI's boards ship with some example firmware that show the FPGA interface works, and the ADC can sample signals. I have done some basic tests with that (to confirm the hardware and software setup works).

Before using the MTI or Altera IP, and having the subtleties of JESD204B hidden from me, I want to get some basic transceiver interface tests working first, and then look at the JESD204B traffic ... once I have some data flowing, the JESD204B standard and the ADC data sheet will be easier to read, and then I can see if its easy enough to create the IP from scratch, or see if I should use the MTI or Altera IP.

I'll post my results to the forum.

Cheers,

Dave

--- Quote Start ---

Hi Nial,

Before using the MTI or Altera IP, and having the subtleties of JESD204B hidden from me, I want to get some basic transceiver interface tests working first, and then look at the JESD204B traffic ... once I have some data flowing, the JESD204B standard and the ADC data sheet will be easier to read, and then I can see if its easy enough to create the IP from scratch, or see if I should use the MTI or Altera IP.

I'll post my results to the forum.

Cheers,

Dave

--- Quote End ---

Crazy helpful too!

I thought the Xilinx IP was free but it looks like it isn't....

http://www.xilinx.com/products/intellectual-property/ipaccess_fee.htm

So there isn't much pressure on Altera to release a free core. :-(

An update of your experiences with this would be interesting.

Thanks,

Nial.