Altera_Forum
Honored Contributor
14 years agoAdc /dac
Hello...i'm so new to verilog HDL n FPGA....
i want to ask is it possible to design ADC and DAC using Verilog HDL?. if possible how to design it? Thanks,Hello...i'm so new to verilog HDL n FPGA....
i want to ask is it possible to design ADC and DAC using Verilog HDL?. if possible how to design it? Thanks,If you mean implementing a true ADC or DAC (i.e. using analog signals), with Altera devices the answer is No. FPGAs and CPLDs are inherently digital devices so you can interface an external A/D or D/A converter but you are not supposed to directly connect analog signals to the device pins.
Remarks: - other vendors may have mixed signal FPGAs, for example Actel Fusion devices. - a simple D/A conversion can be implemented driving a fpga pin with pwm, although you generally also need additional analog stages (buffer, amplifier, filter) out of fpga. - I even saw a couple of applications where digital FPGA pins (actually a LVDS receiver and a LVTTL output) were used to implement A/D conversion, through an external RC. Anyway this is a non conventional design and I don't think it leads to a straightforward implementation.Thanks cris72,...
How about the modulation...digital modulation like ASK....is it possible to design using Verilog HDL? Thanks in advance,Everything digital is virtually implementable in FPGAs. The limits are dictated by device resources and speed.
Basic ASK (on-off keying) is a quite straightforward design, if you have a minimal HDL experience. With multi-level ASK you generally need external A/D stages.Thanks Cris72
is there anyone can guide me how to design ask modulation using verilog? ThanksExactly. I meant a S-D converter.
I had found this: http://www.eetimes.com/design/programmable-logic/4212273/how-to-implement--all-digital- -analog-to-digital-converters-in-FPGAs-and-ASICs and this one (sssh, don't tell it around, it's from a competitor :rolleyes:): http://www.latticesemi.com/documents/wp-creating_an_adc_using_fpga_resources.pdf Actually I think the way of operation is quite easy to understand; on the other hand, the implementation could be difficult because it involves non trivial HDL coding and some physical device parameters must be accounted for.