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Altera_Forum
Honored Contributor
Honored ContributorAdc /dac
Hello...i'm so new to verilog HDL n FPGA.... i want to ask is it possible to design ADC and DAC using Verilog HDL?. if possible how to design it? Thanks,
Altera_ForumHonored Contributor
Honored ContributorEverything digital is virtually implementable in FPGAs. The limits are dictated by device resources and speed.
Basic ASK (on-off keying) is a quite straightforward design, if you have a minimal HDL experience. With multi-level ASK you generally need external A/D stages.
