cyclonevmaster
New Contributor
2 years agohow to write data to fpga side sdram on cyclonev
it spends me many days and nights ,any help will be appreciated!
i want to write data to fpga side sdram from hps,and my qsys system is do so
my code is
//gcc 标准头文件
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#define soc_cv_av //定义使用 soc_cv_av 硬件平台
#include "hwlib.h"
#include "socal/socal.h"
#include "socal/hps.h"
//与用户具体 HPS 应用系统相关的硬件描述头文件
#include "hps_0.h"
#define HW_REGS_BASE (0xc0000000 )//HPS 外设地址段基地址
#define HW_REGS_SPAN (0x04000000 ) //HPS 外设地址段地址空间
#define HW_REGS_MASK (HW_REGS_SPAN - 1 ) //HPS 外设地址段地址掩码
#define L3_BASE_ADDRESS (0xFF800000)
#define L3_CONFIG_REG_OFFSET (0x0)
static volatile unsigned long *emif_virtual_base = NULL; //pl_ddr3 虚拟地址
static volatile uint32_t *l3_virtual_base; //L3 32位寄存器虚拟地址
int fpga_init(long int *virtual_base,long int *l3_base) {
int fd;
void *periph_virtual_base; //外设空间虚拟地址
//打开 MPU
if ((fd = open("/dev/mem", ( O_RDWR | O_SYNC))) == -1) {
printf("ERROR: could not open \"/dev/mem\"...\n");
return (1);
}
//将外设地址段映射到用户空间
periph_virtual_base = mmap( NULL, HW_REGS_SPAN, ( PROT_READ | PROT_WRITE),
MAP_SHARED, fd, HW_REGS_BASE);
if (periph_virtual_base == MAP_FAILED) {
printf("ERROR: mmap() failed...\n");
close(fd);
return (1);
}
// 映射 L3 寄存器地址到用户空间
l3_virtual_base = (volatile uint32_t *)mmap(NULL, sizeof(uint32_t), PROT_READ | PROT_WRITE,
MAP_SHARED, fd, L3_BASE_ADDRESS + L3_CONFIG_REG_OFFSET);
if (l3_virtual_base == MAP_FAILED) {
printf("ERROR: mmap()L3 failed...\n");
close(fd);
return 1;
}
//映射得到 pl_ddr3 外设虚拟地址
emif_virtual_base = periph_virtual_base
+ ((unsigned long) (MEM_IF_DDR3_EMIF_0_BASE)
& (unsigned long) ( HW_REGS_MASK));
*virtual_base = periph_virtual_base; //将外设虚拟地址保存,用以释放时候使用
*l3_base = l3_virtual_base;
return fd;
}
int main(int argc, char ** argv) {
int fd;
long int virtual_base = 0; //虚拟基地址
long int l3_base = 0;
uint32_t l3_config_value;
//完成 fpga 侧外设虚拟地址映射
fd = fpga_init(&virtual_base, &l3_base) ;
printf("mem map successfully!\n");
int i;
int read_data;
// 设置低5位为1
l3_config_value = *l3_virtual_base;
l3_config_value |= 0x1F;
printf("1\n");
*(emif_virtual_base + 0) = 5;//<< i;
printf("write finished!\n");
usleep(100000);
read_data = *(emif_virtual_base + 0);
printf("read data = %d\n",read_data);
usleep(100000);
printf("game over\n");
//取消虚拟地址映射
if (munmap(virtual_base, HW_REGS_SPAN) != 0) {
printf("ERROR:periph munmap() failed...\n");
close(fd);
return (1);
}
if (munmap(l3_base, HW_REGS_SPAN) != 0) {
printf("ERROR:l3 munmap() failed...\n");
close(fd);
return (1);
}
close(fd); //关闭 MPU
return 0;
}
however,when i ran the code , the result is
i have 3 questions
1:is to config the L3 register bit3 to 1 necessary? I find some document shows that i need to set the L3 register bit 3 to 1 to enable the h2f_axi_master
2.wheather the mm_bridge_1 ip is necessary in my design? i saw someone connnet the ddr3 ip-avl to h2f_axi_master immediately?
3.what is the possible reason for the bus error?
thx a lot!