How to instaniate a SFL ip core in the design

Hello,

I am using ARRIA10 with EPCQL1024, now the ARRIA10 is ok, the SOF can be configured into the FPGA, but when I configure the EPCQ1024 with JIC file, the configuration failed.

After read an370, I find the chip ARRIA10 should use SFL ip core to configure the JIC, but I don't know how to instaniate the ip core in my design, such as the port connection. especially the port asmi_access_granted and asmi_access_request; should I assign all the port to the PIN of ARRIA10 CHIP?

sfl (
input wire asmi_access_granted, // asmi_access_granted.asmi_access_granted
output wire asmi_access_request, // asmi_access_request.asmi_access_request
input wire [3:0] data_in, // data_in.data_in
input wire [3:0] data_oe, // data_oe.data_oe
output wire [3:0] data_out, // data_out.data_out
input wire dclk_in, // dclk_in.dclkin
input wire [2:0] ncso_in, // ncso_in.scein
input wire noe_in // noe_in.noe
);

Is there anyone share the code how to instaniate?

Thanks

KUANG Wu