DE0 Nios II EPCS boot

hi crts ! i got the same error

i found tech note from altera with patch saying for some chips such as EPCS4N (N for lead-free version) there is a different RDID then needs the patch file inside the /bin directory

but i tried it with a board using a EPCS4N chip : still got same error msg

did you find solution to this ?

Thanks !

to those who got the same problem , to let you know i found the solution at least for my case ;-) here is how :

- note i was not running it not on a DE0 devp kit , but on a smaller custom devp board CycloneII

- running NiosII flash prog in debug mode from command line & adding the --debug option , i found the problem was linked to the data contents read from the EPCS chip registers

- from this error i found some tips in Altera Knowledge Base , saying it can be linked to the EPCS controller not being in the proper RESET state when trying to be accessed by the JTAG module inside the NiosII cpu

- so back into back into my QSys design i realized that the EPCS flash controller had its RESET connected to the main Clk_Reset , but not to the JTAG_Reset : so i rebuilt in QSys after having connected the EPCS controller to the JTAG_Reset of NiosII

- then i recompiled in Quartus , then on to NiosII SBT : then into Flash Programmer i selected to flash into the EPCS : 1st area the converted-SOF of the design , followed by 2nd area the converted-ELF which should include the "--after ..." option : this is VERY important to make sure you flash your NiosII-software-ELF part !AFTER! the "SOF" general fpga configuration part (produced from QuartusII) : in my case i wanted both fpga-configuration + nios2-software to be inside the EPCS flash chip , so this option was needed (read the NiosII Flash Programmer pdf guide for more details , some are really important depending on your custom board's config)

- after that all was ok :-)

Just further to MrTea's comments...

I have just spent 6 hours trying to flash my EPCS device... I had a smaller test project flash to it just fine, and I couldn't work out why my larger project was not taking... It had the classic "can't locate EPCS registers" error.

Then I noticed that on the working design I had both the data and instruction buses hooked up to the EPCS serial component (in SOPC), and on the larger design I just had the instruction bus hooked up... Changed it to include the databus too and it worked... woohoo... *screams in frustration and relief*

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- from this error i found some tips in Altera Knowledge Base , saying it can be linked to the EPCS controller not being in the proper RESET state when trying to be accessed by the JTAG module inside the NiosII cpu

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Title

Why does the Nios II Processor Flash controller not find the EPCS registers and fail when trying to program the flash?

Description

The JTAG debug module in the Nios® II Processor asserts the reset output to clear registers in the flash controller during the controller detection phase. Detection can fail if the registers are not seen to be in their default state.

Ensure the jtag_debug_module_reset output from the Nios II Processor is connected to the EPCS Serial Flash Controller reset input.

http://www.altera.com/support/kdb/solutions/rd07072011_71.html

Hi crts1973,

Have you solved the problem?

Recently, I got the same mistake.

I have successfully used the flash programmer to load my .sof and .elf files onto my epcs64 chip with Nios II SBT. I used Cyclone IVE EP4CE6F1717.

My SOPC builder has SRAM,EPCS controller, sysID,JTAG,PLL,CPU,pio_led.I have set the reset vector to the EPCS controller,exception vetor to SRAM.

The question is when I used the niosII command shell order :nios2-flash-programmer --base=0x00000000 \--epcs hello_world.flash

There is an error:No EPCS registers found: tried looking at address 0x0000100, 0x00000200, 0x00000300 and 0x00000400

I have tried ensuring the jtag_debug_module_reset output from theNios II Processoris connected to the EPCS Serial Flash Controller reset input, but donnot work!

Can you give me some help?

Thanks !

Sincerely Luke.