Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

DE0 Nios II EPCS boot

I am having problems using the flash programmer to load my .sof and .elf files onto the EPCS4 chip of my Terasic DE0 dev board (Cyclone III). My SOPC has an EPCS controller and the reset address of t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

--- Quote Start ---

- from this error i found some tips in Altera Knowledge Base , saying it can be linked to the EPCS controller not being in the proper RESET state when trying to be accessed by the JTAG module inside the NiosII cpu

--- Quote End ---

Title

Why does the Nios II Processor Flash controller not find the EPCS registers and fail when trying to program the flash?

Description

The JTAG debug module in the Nios® II Processor asserts the reset output to clear registers in the flash controller during the controller detection phase. Detection can fail if the registers are not seen to be in their default state.

Ensure the jtag_debug_module_reset output from the Nios II Processor is connected to the EPCS Serial Flash Controller reset input.

http://www.altera.com/support/kdb/solutions/rd07072011_71.html